RX Family
ADC Module Using Firmware Integration Technology
R01AN1666EJ0220 Rev. 2.20
Page 24 of 74
Dec 01, 2016
typedef
enum
e_adc_sst_reg // sample state registers
{
ADC_SST_CH0 =
0
,
ADC_SST_CH1,
ADC_SST_CH2,
ADC_SST_CH3,
ADC_SST_CH4,
ADC_SST_CH5,
ADC_SST_CH6,
ADC_SST_CH7,
ADC_SST_CH8_TO_15,
ADC_SST_TEMPERATURE,
ADC_SST_VOLTAGE,
ADC_SST_REG_MAX = ADC_SST_VOLTAGE
}
adc_sst_reg_t;
#define
ADC_SST_CNT_MIN (
12
)
#define
ADC_SST_CNT_MAX (
255
)
#define
ADC_SST_CNT_DEFAULT (
20
)
typedef
struct
st_adc_time
{
adc_sst_reg_t reg_id;
uint8_t num_states; // ch8-15 use the same value
}
adc_time_t;
/* for ADC_CMD_ENABLE_CHANS */
// Bitwise OR these masks together for desired channels
#define
ADC_MASK_CH0 (
1
<<
0
)
#define
ADC_MASK_CH1 (
1
<<
1
)
#define
ADC_MASK_CH2 (
1
<<
2
)
#define
ADC_MASK_CH3 (
1
<<
3
)
#define
ADC_MASK_CH4 (
1
<<
4
)
#define
ADC_MASK_CH5 (
1
<<
5
)
#define
ADC_MASK_CH6 (
1
<<
6
)
#define
ADC_MASK_CH7 (
1
<<
7
)
#define
ADC_MASK_CH8 (
1
<<
8
)
#define
ADC_MASK_CH9 (
1
<<
9
)
#define
ADC_MASK_CH10 (
1
<<
10
)
#define
ADC_MASK_CH11 (
1
<<
11
)
#define
ADC_MASK_CH12 (
1
<<
12
)
#define
ADC_MASK_CH13 (
1
<<
13
)
#define
ADC_MASK_CH14 (
1
<<
14
)
#define
ADC_MASK_CH15 (
1
<<
15
)
#define
ADC_MASK_GROUPB_OFF (
0
)
#define
ADC_MASK_ADD_OFF (
0
)
#define
ADC_MASK_SAMPLE_HOLD_OFF (
0
)
typedef
enum
e_adc_diag // Self-Diagnosis Channel
{
ADC_DIAG_OFF =
0x00
,
ADC_DIAG_0_VOLT =
0x01
,
ADC_DIAG_HALF_VREFH0 =
0x2
,
ADC_DIAG_VREFH0 =
0x3
,
ADC_DIAG_ROTATE_VOLTS =
0x4
}
adc_diag_t;
#define
ADC_SST_SH_CNT_MIN (
4
) // minimum sample&hold states
#define
ADC_SST_SH_CNT_MAX (
255
) // maximum sample&hold states
#define
ADC_SST_SH_CNT_DEFAULT (
20
) // default sample&hold states