RX Family
ADC Module Using Firmware Integration Technology
R01AN1666EJ0220 Rev. 2.20
Page 37 of 74
Dec 01, 2016
typedef
struct
st_adc_cfg
{
adc_add_t add_cnt;
adc_align_t alignment; // ignored if addition used
adc_clear_t clearing;
adc_speed_t conv_speed;
adc_trig_t trigger;
uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled
}
adc_cfg_t;
/* ADC_CONTROL() ARGUMENT DEFINITIONS */
typedef
enum
e_adc_cmd
{
// Commands for special hardware configurations
ADC_CMD_SET_SAMPLE_STATE_CNT,
// Commands to enable channels or sensors
ADC_CMD_ENABLE_CHANS, // enables chans and INT if priority != 0
ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0
ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0
// Commands to enable hardware triggers or cause software trigger
ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers
ADC_CMD_SCAN_NOW, // software trigger start scan
// Commands to poll for scan completion
ADC_CMD_CHECK_SCAN_DONE, // for Normal
// Advanced control commands
ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs
ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0
ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1
}
adc_cmd_t;
/* for ADC_CMD_SET_SAMPLE_STATE_CNT */
typedef
enum
e_adc_sst_reg // sample state registers
{
ADC_SST_CH0_TO_20,
ADC_SST_TEMPERATURE,
}
adc_sst_reg_t;
#define
ADC_SST_CNT_MIN (
10
)
#define
ADC_SST_CNT_MAX (
255
)
#define
ADC_SST_CNT_DEFAULT (
20
)
typedef
struct
st_adc_time
{
adc_sst_reg_t reg_id;
uint8_t num_states;
}
adc_time_t;
/* for ADC_CMD_ENABLE_CHANS */
// Bitwise OR these masks together for desired channels
#define
ADC_MASK_CH0 (
1
<<
0
)