RX Family
ADC Module Using Firmware Integration Technology
R01AN1666EJ0220 Rev. 2.20
Page 15 of 74
Dec 01, 2016
}
adc_cfg_t;
/* ADC_CONTROL() ARGUMENT DEFINITIONS */
typedef
enum
e_adc_cmd
{
// Commands for special hardware configurations
ADC_CMD_USE_INT_VOLT_AS_HVREF,
ADC_CMD_SET_SAMPLE_STATE_CNT,
// Commands to enable channels or sensors
ADC_CMD_ENABLE_CHANS, // enables chans and A & B INT if pri != 0
ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0
ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0
// Commands to enable hardware triggers or cause software trigger
ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers
ADC_CMD_SCAN_NOW, // software trigger start scan
// Commands to poll for scan completion
ADC_CMD_CHECK_SCAN_DONE, // for Normal or GroupA scan
ADC_CMD_CHECK_SCAN_DONE_GROUPA,
ADC_CMD_CHECK_SCAN_DONE_GROUPB,
// Advanced control commands
ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs
ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0
ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1
ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0
ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1
}
adc_cmd_t;
/* for ADC_CMD_SET_SAMPLE_STATE_CNT */
typedef
enum
e_adc_sst_reg // sample state registers
{
ADC_SST_CH0 =
0
,
ADC_SST_CH1,
ADC_SST_CH2,
ADC_SST_CH3,
ADC_SST_CH4,
ADC_SST_CH5,
ADC_SST_CH6,
ADC_SST_CH7,
ADC_SST_CH8_TO_15,
ADC_SST_CH21,
ADC_SST_TEMPERATURE,
ADC_SST_VOLTAGE,
ADC_SST_REG_MAX = ADC_SST_VOLTAGE
}
adc_sst_reg_t;
#define
ADC_SST_CNT_MIN (
6
)
#define
ADC_SST_CNT_MAX (
255
)
#define
ADC_SST_CNT_DEFAULT (
20
)
typedef
struct
st_adc_time
{
adc_sst_reg_t reg_id;
uint8_t num_states; // ch8-15 use the same value
}
adc_time_t;