Renesas M3A-HS71, User Manual

Page: 34 / 82

Functional Overview
2.3.4U External EEPROM
Rev.1.01 2008.05.07 2-20
REJ11J0012-0101
2
2.3.4 External EEPROM Interface
The SH7670 CPU board standard mounts 128k-bit EEPROM. It uses the I²C bus interface built in SH7670 to
control the EEPROM.
Table 2.3.5 lists the EEPROM specification outline, and Figure 2.3.5 shows the EEPROM interface block diagram.
Table 2.3.5 EEPROM Specification Outline
Part Number Interface Capacity Package
HN58X24128FPIE Double-wire serial (I²C) 128k-bit(16k-word
×
8-bit) 8-pin SOP
Figure 2.3.5 EEPROM Interface Block Diagram