Renesas M3A-HS71, User Manual

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Functional Overview
2.3 Memory
Rev.1.01 2008.05.07 2-15
REJ11J0012-0101
2
2.3 Memory
The SH7670 CPU board includes the RAM (32 KB) built in SH7670, external flash memory, external SDRAM, and
external EEPROM.
The details are described as follows.
2.3.1 RAM built in SH7670
32 KB RAM, 8 KB instruction cache, and 8 KB operand cache are built in the SH7670.
2.3.2 Flash Memory Interface
The SH7670 CPU board standard mounts the flash memory shown in Table 2.3.1 for storing the user program.
The flash memory to boot operates with the external bus 16-bit mode fixed and the power supply voltage operates
with single 3.3V. Also, the flash memory write protect can be controlled enable or disable by the DIP switch.
Figure 2.3.1 shows the flash memory interface block diagram and Table 2.3.2 lists the bus state controller setting
(write/read) at 66.67 MHz operation for the SH7670 bus clock.
Table 2.3.1 Flash Memory Outline
Part Number Bus Size Capacity Access Time
S29GL064A90TFIR4 16-bit mode 8 MB (16-bit x 4M word x 1pc.) 90 ns
SH7670
S29GL064A90TFIR4
8Mbyte
(4M Word ×16bit)
A15-A0
CE#
OE#
WE#
WP#/ACC
RESET#
BYTE#
RD#
WE0#/DQMLL
CS0#
D15-D00 DQ15-DQ0
A16-A01
3.3V
3.3V
DIP
SW8-5
Reset signal
16
16
3.3V
3.3V
3.3V
26
28
11
12
47
15
14
C6
B5
C7
A22-A17
A21-A16
6
4.7K
4.7K
4.7K
4.7K
0
A23 RY/BY#
：
Not mounted
D3
Figure 2.3.1 Flash Memory Interface Block Diagram