Renesas M16C FAMILY, User Manual

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Rev.2.00 Oct 16, 2006 page 206 of 354
REJ09B0340-0200
M30245 Group 2. USB function
(6) USB Transmit (Endpoints 1 to 4 IN): Example
The endpoints 1 to 4 IN transmit packet prepare routine (continuous transfer disable) is shown in
Figure 2.8.49. In addition to packet prepare process, error process by the UNDER_RUN flag is re-
quired in isochronous transfer.
b7
(b15)
b7
(b8)
b0 b0
0 0 0 0 0
b7
(b15)
b7
(b8)
b0 b0
b7
(b15)
b7
(b8)
b0 b0
0 0 0 0 0 0
Process of USB endpoint x IN packet prepare
Completion of packet data prepare
1. Confirming of whether there is a space which is equal to one packet in the IN FIFO:
check the IN_BUF_STS0 and the IN_BUF_STS1.
IN FIFO full
There is a space in the IN FIFO.
2. Writing of the transmit data equal to one packet data (Note 1) to the IN FIFO.
Setting of the transmit data
Note 1: The packet data is one buffer data in continuous transfer mode.
3. Setting of the SET_IN_BUF_RDY bit to “1” and completion of one packet data (Note 2) prepare.
Note 2: The packet data is one buffer data in continuous transfer mode.
Note 3: When the AUTO_SET bit is set to “1”, this bit is automatically set to “1” when the data count set by
maximum packet size register is written to the IN FIFO. When the AUTO_SET bit is set to “0” or the
AUTO_SET bit is set to “1” and it is a short packet (data packet which is smaller than maximum packet size),
this bit is set to “1” by software.
Execution of the above 2 and 3 again when the second
packet data is set on the double buffer mode.
USB endpoint x IN control and status register
EPxICS (x = 1 - 4) [Address 029E
16
, 02A4
16
, 02AA
16
, 02B0
16
]
IN_BUF_STS0 flag
IN_BUF_STS1 flag
b1 b0
0 0 : No data set in the IN buffer
0 1 : Single buffer mode: N/A
Double buffer mode: one data set in the IN buffer
1 0 : N/A
1 1 : Single buffer mode: one data set in the IN buffer
Double buffer mode: two data set in the IN buffer
USB endpoint x IN FIFO data register
EPxI (x = 0 - 4) [Address 02E0
16
, 02E4
16
, 02E8
16
, 02EC
16
, 02F0
16
]
USB endpoint x IN control and status register
EPxICS (x = 1 - 4) [Address 029E
16
, 02A4
16
, 02AA
16
, 02B0
16
]
SET_IN_BUF_RDY bit
1 : Transmission data set loaded to the IN buffer
(updates IN_BUF_STS0, IN_BUF_STS1 flags)
Figure 2.8.49. Endpoint 1 to 4 IN packet prepare routine