Renesas M16C FAMILY, User Manual

Page: 52 / 369

Rev.2.00 Oct 16, 2006 page 41 of 354
REJ09B0340-0200
M30245 Group 2. Clock-Synchronous Serial I/O
Figure 2.3.1. Memory map of serial I/O-related registers
0042
16
0048
16
004A
16
004D
16
004F
16
0051
16
0053
16
0055
16
0328
16
0329
16
032A
16
032B
16
032C
16
032D
16
032E
16
032F
16
0338
16
0339
16
033A
16
033B
16
033C
16
033D
16
033E
16
0368
16
0369
16
036A
16
036B
16
036C
16
036D
16
036E
16
036F
16
033F
16
03A8
16
03A9
16
03AA
16
03AB
16
03AC
16
03AD
16
03AE
16
03AF
16
UART2 receive/ACK interrupt control register (S2RIC)
UART1 receive/ACK/SSI1 interrupt control register (S1RIC)
UART0 receive/ACK/SSI0 interrupt control register (S0RIC)
UART3 transmit/NACK interrupt control register (S3TIC)
UART1 transmit/NACK/SSI1 interrupt control register (S1TIC)
UART2 transmit/NACK interrupt control register (S2TIC)
UART0 transmit/NACK/SSI0 interrupt control register (S0TIC)
UART3 receive/ACK interrupt control register (S3RIC)
UART3 transmit / receive mode register (U3MR)
UART3 bit rate generator (U3BRG)
UART3 transmit buffer register (U3TB)
UART3 transmit / receive control register 0 (U3C0)
UART3 transmit / receive control register 1 (U3C1)
UART3 receive buffer register (U3RB)
UART2 transmit / receive mode register (U2MR)
UART2 bit rate generator (U2BRG)
UART2 transmit buffer register (U2TB)
UART2 transmit / receive control register 0 (U2C0)
UART2 transmit / receive control register 1 (U2C1)
UART2 receive buffer register (U2RB)
UART1 transmit / receive mode register (U1MR)
UART1 bit rate generator (U1BRG)
UART1 transmit buffer register (U1TB)
UART1 transmit / receive control register 0 (U1C0)
UART1 transmit / receive control register 1 (U1C1)
UART1 receive buffer register (U1RB)
UART0 transmit / receive mode register (U0MR)
UART0 bit rate generator (U0BRG)
UART0 transmit buffer register (U0TB)
UART0 transmit / receive control register 0 (U0C0)
UART0 transmit / receive control register 1 (U0C1)
UART0 receive buffer register (U0RB)
cessive reception mode disabled
(6) Input to the serial I/O and the direction register
To input an external signal to the serial I/O, slect the function select register A to I/O port and set the
direction register to input.
(7) Pins related to the serial I/O
_______ ________ ________ _______
• CTS
0
, CTS
1
, CTS
2
, CTS
3
pins
_______
Input pins for the CTS function
________ ________ ________ _______
• RTS
0
, RTS
1
, RTS
2
, RTS
3
pins
_______
Output pins for the RTS function
• CLK
0
, CLK
1
, CLK
2
, CLK
3
pins Input/output pins for the transfer clock
• RxD
0
, RxD
1
, RxD
2
, RxD
3
pins Input pins for data
• TxD
0
, TxD
1
, TxD
2
, TxD
3
pins Output pins for data (Note)
Note: Since TxD
2
pin is N-channel open drain, this pin needs pull-up resistor.
(8) Registers related to the serial I/O
Figure 2.3.1 shows the memory map of serial I/O-related registers, and Figures 2.3.2 to 2.3.4 show
serial I/O-related registers.