RadiSys EPC-5A, Hardware & Software Reference Manual

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EPC-5A Hardware & Software Reference Manual
Page 62
6 6
486
Address
M o t o r o l a
Address
Addr Addr+1 Addr+2 Addr+3
Addr Addr+1 Addr+2 Addr+3
LSB
MSB
10 32 54
76
10
32 54 76
Addr Addr+1
Addr Addr+1
LSB
MSB
10
32
10 32
D16
Access
D32
Access
Figure 6-4. Big-Endian Byte-swapping.
When using big-endian byte ordering, care must be taken to assure that the VME
address is aligned on a boundary; for D16 accesses the VME address must be on a
word boundary (address evenly divisible by 2) and for D32 accesses the VME address
must be on a double-word boundary (evenly divisible by 4).
If this is not done, the results will be “scrambled” data. Although the VMEbus
address must be boundary-aligned to match the data width (word or double-word),
the 486 address does not need to be boundary-aligned.
Another consideration is the compiler being used. Some compilers produce two
16-bit accesses when a 32-bit access is desired. When this occurs, again the data will
be “scrambled.”
When transferring a 32-bit floating-point number, special care must be taken to assure
that both processors use the same floating-point format; and that both systems expect
the mantissa and exponent in the same byte locations. As long as this is correct,
transferring a floating-point number will work correctly. Since transferring a 64-bit
floating-point number is not supported in hardware, two 32-bit transfers must be used
with little-endian byte order and then byte-swapping must be accomplished in
software.
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!
CAUTION
Byte swapping applies only to EPC-5A initiated (master)
accesses; it does not apply to slave accesses from other VMEbus
masters to the EPC-5A’s DRAM.
The EPConnect Bus Manager software provides a means of selecting the byte
ordering during memory-copy operations.