RadiSys EPC-5A, Hardware & Software Reference Manual

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EPC-5A Hardware & Software Reference Manual
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6 6
2. A read of the response register from VME clears the LOCK bit
(immediately after the current value of the response register is returned).
Register State after Reset
A hardware reset of the EPC-5A (not a keyboard CTRL+ALT+DEL reset) clears all
of the register bits to 0, except for RELM, ARBM, ARBPRI, and the registers at ports
8130h, 8150h, and 8151h, which may be in an undefined state. (All bits, however, are
cleared by a power-on reset.) However, this may not be apparent because the BIOS
initialization sequence then reinitializes values in these register fields, largely as a
result of the non-volatile configuration information specified in the setup screen.
The BIOS clears the interrupt enable and event enable registers.
Supported Address Modifiers
2Dh A16 supervisor
39h A24 non-privileged data
3Ah A24 non-privileged program
3Dh A24 supervisor data
3Eh A24 supervisor program
09h A32 non-privileged data
0Ah A32 non-privileged program
0Dh A32 supervisor data
0Eh A32 supervisor program
Table 6-3. Support Address Modifiers.