RadiSys EPC-5A, Hardware & Software Reference Manual

Page: 58 / 156

EPC-5A Hardware & Software Reference Manual
Page 50
5 5
For a 32 MB EPC-5A, the extended memory address space is defined as
00100000 01FFFFFF 32764 KB DRAM extended memory
For a 64 MB EPC-5A, the extended memory address space is defined as
00100000 20000000 65536 KB DRAM extended memory
Note that since the EXM expansion interface has 24 address lines, some of the
“uncommitted; mapped to EXM interface” address areas map repeatedly, or wrap-
around, in the EXM interface's address space.
Peripheral Components
The EPC-5A uses the TI-16C452 controller to provide legacy I/O device support.
This chip provides two NS16C450-compatible serial ports and a parallel port. Since
LPTOEN ties to low, this port is output-only.
The serial ports signal interrupts on IRQ3 and IRQ4 and are accessible at the standard
PC-AT architecture I/O base addresses of 3F8h and 2F8h respectively. The parallel
port signals interrupts on IRQ7 and is accessible at the standard PC-AT architecture
I/O base address of 378h.
Real Time Clock
The system contains a real time clock module that is compatible with the Motorola
146818A. The RTC is implemented in the R400EX and contains 114 bytes of CMOS
RAM. The RTC and PC/AT CMOS RAM are addressable at the standard PC/AT
architecture I/O addresses of 70h and 71h and interrupts are signaled on IRQ8. The
System BIOS initializes the RTC on coldstarts if the RTC contains bad values.