System Installation
WADE-8021 User’s Manual
3-4
3.3.4 Audio
Controller
Please find Intel® High Definition Audio driver form WADE-8021 CD-title. The
drivers support Windows 2000/XP .
3.3.5 Intel® Active Management Technology (Intel® AMT)
Please find the Intel ME Firmware 7.0 driver from WADE-8021 CD-title. The drivers
support Windows 2000/XP
3.4
Clear CMOS Operation
The following table indicates how to enable/disable Clear CMOS Function hardware
circuit by putting jumpers at proper position.
CMOS clear Jumper (JP10)
JP10
Function
Open Normal
Operation
short Clear
CMOS
Contents
3.5 WDT Function
The Watchdog Timer of motherboard consists of 8-bit programmable time-out
counter and a control and status register.
WDT Controller Register
There are two PNP I/O port addresses that can be used to configure WDT,
(1) 0x2E:EFIR (Extended Function Index Register, for identifying CR index number)
(2) 0x2F:EFDR (Extended Function Data Register, for accessing desired CR)
WDT Control Mode Register
The working algorithm of the WDT function can be simply described as a counting
process. The Time-Out Interval can be set through software programming. The
availability of the time-out interval settings by software or hardware varies from
boards to boards.
WADE-8021 allows users to control WDT through dynamic software programming.
The WDT starts counting when it is activated. It sends out a signal to system reset or
to non-maskable interrupt (NMI), when time-out interval ends. To prevent the
time-out interval from running out, a re-trigger signal will need to be sent before the
counting reaches its end. This action will restart the counting process. A well-written
WDT program should keep the counting process running under normal condition.
WDT should never generate a system reset or NMI signal unless the system runs into
troubles.
The related Control Registers of WDT are all included in the following sample
program that is written in C language. User can fill a non-zero value into the
