PCM-061/phyCORE-i.MX7 System on Module
L-821e_2
© PHYTEC America L.L.C. 2017
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7.4
QSPI NOR Flash Memory (U9)
The phyCORE-i.MX7 can be populated with a SPI Flash memory device via the QSPI_A bus as an ordering option. This
would be suitable for applications which require a small code footprint or small RTOS.
Using a SPI Flash can eliminate the need to install NAND Flash or eMMC memory on the SOM. This could reduce BOM
costs, free up the NAND signals for other muxing options, and remove the need for the bad block management that is
required when using NAND Flash.
7.5
Memory Model
There is no special address decoding device on the phyCORE-i.MX7, therefore the memory model is given according to
the memory mapping of the i.MX7. Please refer to the i.MX7 Technical Reference Manual for the memory map.
