PCM-061/phyCORE-i.MX7 System on Module
L-821e_2
© PHYTEC America L.L.C. 2017
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4
Power
The SOM has two input voltage rails and two output rails that are accessible externally via the phyCORE-Connectors. The
input rails consist of the main input power, VCC_SOM, and the battery backup power, VBAT. The SOM then generates and
provides both the VLDO2_1V5 rail and the SW2_1V8 rail as outputs.
The SW2_1V8 output rail is provided for sequencing external power as needed for interfacing with the various 1.8V signals.
Note that SW2_1V8 is NOT intended for directly supplying devices and circuits externally. Various internal functions of the
SOM are powered via SW2_1V8, so introducing an additional external load may have negative impacts on the performance
of the SOM. Drawing excessive current may cause brown out conditions or potentially introduce noise. Please note the
recommended maximum load current when sequencing with SW2_1V8 (refer to
Table 13
).
NOTE:
It is possible to supply external devices and circuits via SW2_1V8, but caution must be taken. The power consumption
of the SOM will depend on the use case and which 1.8V interfaces are implemented. If the risks are acknowledged and
understood, then SW2_1V8 can supply external devices as long as the maximum current limits are adhered to. Refer to
the PMIC and i.MX7 reference documentation for further information.
The recommended operating conditions of these external rails are provided in
Table 13.
These power rails will be
discussed in greater detail in the following sections of this chapter.
CAUTION:
As a general design rule, we recommend connecting all 3.3V input pins to your power supply and at least a matching
number of ground (GND) pins. For the best EMI performance, it is recommended to connect ALL ground pins at the
phyCORE-Connector (X1, X2) to a solid ground plane. At the very least a matching number of ground pins to power pins
should be made, in addition to using the ground pins surrounding signals used in application circuitry. Please refer to
Table 3
for the locations of all ground pins on the phyCORE-Connector.
The following sections of this chapter describe the power design of the phyCORE-i.MX7 in further detail.
4.1
Primary System Power (VCC_SOM)
The phyCORE-i.MX7 operates from a voltage supply with a nominal value of +3.3V. The PMIC and On-board switching
regulators generate the voltage supplies required by the i.MX7 processor and on-board components from the 3.3V
supplied to the SOM.
The phyCORE-i.MX7 requires a +3.3V (+-5%) / 3A supply at the phyCORE-connector pins X1-A56, A57, A58, A59 to
guarantee enough power under all operating conditions. Your particular operating conditions may vary and require less
power (refer to
Table 13
). The phyBOARD-Zeta platform provides a shunt resistor as an access point for measuring the
SOM current.
Connect all 3.3V input pins to your power supply and at least the matching number of GND pins.
4.2
Power Mode Management
The phyCORE-i.MX7 provides an X_MX7_ONOFF signal that allows the control of the transitions between the various
power modes of the i.MX7. This signal, which is de-bounced and pulled up internally, may be connected to a switch on a
baseboard to provide a mechanical means of driving the signal low. If the X_MX7_ONOFF button is driven low briefly when
the processor is in an SNVS or low power mode, the i.MX7 will transition to the RUN mode. When a ‘long’ press occurs
on
X_MX7_ONOFF in the RUN mode, the processor will transition back to the SNVS mode. The technical reference manual
can be referenced for further details regarding the various power modes.
