PCM-061/phyCORE-i.MX7 System on Module
L-821e_2
© PHYTEC America L.L.C. 2017
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7
System Memory
The phyCORE-i.MX7 provides five types of on-board memory:
•
DDR3 SDRAM
•
eMMC or NAND FLASH
•
SPI NOR FLASH
•
I
2
C EEPROM
NOTE:
The phyCORE-i.MX7 does not support the use of eMMC and NAND flash storage at the same time. Only one of the
storage devices can be populated on the SOM at any given time. Additional NAND or eMMC devices need to be
implemented on the Carrier Board.
The following sections of this chapter detail each memory type used on the phyCORE-i.MX7.
7.1
DDR3 SDRAM (U3, U4)
The RAM memory on the phyCORE-i.MX7 is comprised of two 16-bit wide DDR3 SDRAM chips for a 32-bit wide interface
providing up to 2GB of SDRAM. These chips are connected to the dedicated DDR controller of the i.MX7 processor.
Typically, the DDR3 SDRAM initialization is performed by a boot loader or operating system following a power-on reset
and must not be changed at a later point by any application code. When writing custom code independent of an operating
system or boot loader, SDRAM must be initialized through the appropriate SDRAM configuration registers on the i.MX7
controller. Refer to the i.MX7 Technical Reference Manual about accessing and configuring these registers.
7.2
eMMC (U5) and NAND Flash (U6) Memory
The phyCORE-i.MX7 can be populated with either an eMMC or NAND flash as an easy to program nonvolatile memory
solution. The phyCORE-i.MX7 does not support the use of both eMMC (U5) and NAND (U6) simultaneously. Only one of
these can be populated on the SOM. If it is necessary to support both NAND and eMMC, additional NAND or eMMC devices
can be implemented on a Carrier Board.
The eMMC flash is connected to the SD/MMC3 interface of the i.MX7 with a bus width of 8-bits, supporting up to 128GB
of eMMC.
NAND flash is supported via the RawNAND interface (multiplexed via the SD/MMC3 interface on the phyCORE-i.MX7) with
an 8-bit bus width, supporting up to 8GB of NAND.
7.3
I
2
C EEPROM (U11)
The phyCORE-i.MX7 can be populated with a nonvolatile 4KB EEPROM with an I
2
C interface as an ordering option. This
memory can be used to store configuration data or other general purpose data. This device is accessed through I
2
C port 1
on the i.MX7 at address 0x50.
