Phytec phyCORE-167CR, Hardware Manual

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Jumpers
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PHYTEC Meßtechnik GmbH 2002 L-527e_8
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3.1 J1 Use of Pin 30 on the SRAM
Jumper J1 determines the use of pin 30 on the SRAM devices at U2
and U3. On SRAM devices with a capacity of 128 kBytes, pin 30 is
defined as an active-high Chip Select signal. To enable access to such
SRAM devices, a high-level should be applied to pin 30. On SRAM
devices with a capacity of more than 512 kBytes, pin 30 is used as
address line A17. In case the SRAM has a 16-bit bus width, this pin
must be connected to address line A18 of the microcontroller.
On the phyCORE-167CR/167CS, J1 should be used as follows:
Jumper J1 must be closed at positions 2+3 if the
phyCORE-167CR/167CS is populated with external SRAM devices
with a total capacity of 2*128 kByte. This results in a hard-wired
connection of VCC to pin 30 of the SRAM. If an SRAM memory
configuration of 2*512 kByte is used, pin 30 (A17) on the SRAM
must be connected to address line A18 of the microcontroller. This is
done by setting Jumper J1 to position 1+2. Please note that a “virtual”
16-bit SRAM memory bus width is achieved by using two parallel
8-bit SRAM devices. Address A0 of the microcontroller enables
internal selection of the memory components and is used for
generation of the appropriate write signals /WRL and /WRH.
The following configurations are possible:
SRAM Configuration J1
2 x 128 kByte SRAM 2 + 3*
2 x 512 kByte SRAM 1 + 2
* = Default setting
Table 3: J1 SRAM Capacity Configuration