Philips DVDR1000/001, Service Manual

Page: 179 / 317

Circuit-, IC Descriptions and List of Abbreviations
GB 179 DVDR1000 /0x1 /691 9.
Multi-channel filter DAC UDA1328T
7 PINNING
SYMBOL PIN DESCRIPTION
VOUT3 1 channel 3 analog output
VOUT4 2 channel 4 analog output
V
SSA
3 analog ground
VOUT5 4 channel 5 analog output
VOUT6 5 channel 6 analog output
V
DDA
6 analog supply voltage
n.c. 7 not connected (reserved)
TEST3 8 test output 3
STATIC 9 static mode/L3 mode switch input
BCK 10 bit clock input
WS 11 word select input
DATAI12 12 data input channel 1 and 2
DATAI34 13 data input channel 3 and 4
DATAI56 14 data input channel 5 and 6
n.c. 15 not connected (reserved)
SYSCLK 16 system clock: 256f
s
, 384f
s
,
512f
s
and 768f
s
L3MODE 17 L3 mode selection input
L3CLOCK 18 L3 clock input
L3DATA 19 L3 data input
V
SSD
20 digital ground
V
DDD
21 digital supply voltage
TEST2 22 test output 2
MUTE 23 static mute control input
DEEM1 24 DEEM control 1 input
(static mode)
DEEM0 25 L3 address select
(L3 mode)/DEEM control 0 input
(static mode)
DS 26 digital silence detect output
TEST1 27 test input 1
VOUT1P 28 channel 1 analog output P
VOUT1N 29 channel 1 analog output N
V
ref
30 DAC reference voltage
VOUT2N 31 channel 2 analog output N
VOUT2P 32 channel 2 analog output P
Fig.2 Pin configuration.
handbook, halfpage
UDA1328T
MGR980
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VOUT3
VOUT4
VSSA
VOUT5
VOUT6
VDDA
n.c.
TEST3
STATIC
BCK
WS
DATAI12
DATAI34
DATAI56
VOUT2P
VOUT2N
Vref
VOUT1N
TEST1
DS
VOUT1P
DEEM0
DEEM1
MUTE
TEST2
VDDD
VSSD
L3DATA
n.c.
SYSCLK
L3CLOCK
L3MODE