Circuit-, IC Descriptions and List of Abbreviations
GB 166
DVDR1000 /0x1 /691
9.
9.4
Analog Board Nafta version
9.4.1
Microprocessor TMP93C071F
The microcontroller
„
AIO
“
TMP93C071F is a 16bit
microcontroller with internal ROM and 8kB RAM. It includes
the following functions:
•
A/D converters
•
composite sync input
•
I
2
C bus interface
The following connection to the mains, a positive pulse on the
reset input on the P is generated by the reset-IC TL7705
(Pos.7900).
The system clock is generated with the 20MHz quartz (Pos.
1994).
9.4.2
Bus Systems
The communication between the P and the other functional
groups is via the I
2
C-bus (SDA, SCL). The clock rate is
approx. 95kHz.
Functional groups on the I
2
C bus:
•
E
2
PROM ST24E16 (Pos. 7815)
•
Tuner (Pos. 1705)
•
Matrix-switch STV6410 (Pos. 7507)
•
Audio IC / MSP (Pos. 7600)
•
Display board (Pos. 1987)
9.4.3
E
2
PROM
The E
2
PROM ST24E16 (Pos. 7815) is an electric erasable
and writeable, non-volatile memory. The E
2
PROM stores
data specific to the device, such as the AFC-reference value,
clock-correction-factor, etc. The data is accessed by the P
via the I
2
C-bus.
9.4.4
FOME
The FOME (Follow Me) -circuit compares the video signal
coming from the tuner and the one coming from the Scart-
plug 1. If the video-signals are identical the output of the
FOME-circuit is low.
9.4.5
Fan Control
The fan control circuit is necessary to control the speed of the
cabinet fan (Pos. 1984) according to the requirements in
temperature and noise. The temperature is measured via an
NTC on the display board (Pos. 3145). When the
temperature is lower than 25
°
C the fan-voltage is approx. 5V
and will reach approx. 10V at a temperature of 40
°
C. It is also
possible to switch off the fan via the control line ION_FAN.
The circuit generates also two control-signals: TEMP goes to
the P and BE_FAN is the control-line for the basic engine fan.
9.4.6
Power Supply
The 5SW and 8SW supply are switched off in case of Stby
from the P via the ISTBY-line. This is possible for power-
save. The ISTBY-line must be low in case of STBY. There is
also a
„
power fail
“
circuit on the PS-schematic which is
necessary to mute AUDIO when IPFAIL is low.
9.4.7
Front End (TU, AP Part)
The front end comprises the following parts:
•
Tuner [1705]
•
IF amplifier & video demodulator IC TDA 9817 [7703]
•
Sound processor MSP3445G [7600]
IF Selection
The IF frequency of the video carrier is 45.75 MHz. A quasi-
split audio system is used. Separate surface-wave filters
(SAW) are required. [1701] for video, [1702] for audio.
IF Demodulator
TDA 9817
The IF signal from the tuner is processed by the demodulator
IC TDA 9817 [7703]. A QSS-audio-IF signal SIF1 is
generated for demodulation in the sound processor [7600].
Audio carriers are converted from the tuner IF level into the
audio IF position and further processed in the audio
demodulator [7600]. The AFC coil [5703] on the TDA 9817 is
adjusted so that when a frequency of 45.75 MHz is supplied
to the IF output of the tuner, the AFC voltage on pin 17 of the
TDA 9817 is 2.5V. The HF-AGC is set using the AGC
controller [3707] so that, with a sufficiently large antenna
input signal (74 dBV) the voltage at the IF output of the tuner
[1705] pin 11 is 500 mVpp. This setting must be carried out,
when the audio carrier is switched off. The demodulated
video signal appears on pin 16 [7703]. The demodulator AGC
voltage at pin4 is used to determine the antenna signal
strength after a buffer [7705] with the signal AGC_MUTE. In
the opposite direction this line may be used to mute the
demodulator to avoid crosstalk in all cases, where the tuner
signal is not needed. In this case a
„
high
“
signal is sent via
AGC_MUTE and the conducting diode [6703] to pin4. The
video trap [1703] reduces adjacent channel video and sound
carrier remainders in the video. The demodulated video
signal VFV is available after the buffer and limiter stage for
noise peaks [7706]. The FM-PLL demodulator function of
TDA 9817 is not used and deactivated by the resistor [3726].
Audio Demodulator
Sound processor MSP 3445G
The MSP 3445G [7600] is a NTSC sound processor.
Amplitude and bandwidth of the demodulated audio signals
can be determined in the MSP using the corresponding
commands via the I2C bus. The audio signal from the tuner
is available at the pins 30 AFER and 31 AFEL.
9.4.8
Video-Routing (Nafta Version)
General Description:
The complete Video- I/O-switching is basically realised by
the I/O switch STV6410A, which is controlled via IIC-Bus-0
(SDA/SCL) by the all in one C on the analogue board. The
STV 6410 has three YCVBS, three chroma, and one RGB
switch which is not used in the Nafta I/O. All switches have 6-
dB amplification on the outputs. The YCVBS inputs have
bottom clamp, the chroma inputs have average clamp, and
the RGB switch has bottom clamp circuits at the inputs. The
R/C inputs can be switched to average clamp for chroma
signals via I2C bus.
Two pre-selectors BA 7652 are additionally used: One for
switching between Y- Rear and Front, the second for
switching between Chroma- Rear and Front signal. Both pre-
selectors are controlled via IS1 and IS2 from the analogue
board C.
CVBS Signals:
There are two CVBS input connection possibilities: Front
chinch (E5) and Rear Chinch In (E3). Both CVBS sources are
connected direct to the STV 6410 and routed to Rear Out 1
and Rear Out 2 via the 75-Ohm driver BA 7623. Both CVBS
output sockets are connected to BA 7623 in parallel.
Independent of the input signal quality (CVBS, S-Video or Y/
UV) the digital board supplies also S-Video and Y/UV signals
to the corresponding sockets.
Summary of Contents for DVDR1000/001
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