MEMORY
INTERFACE
SD
CARD
27MHz CLOCK
PCLK (13.5MHz)
IC2002 (MULTIMEDIA DIGTAL IMAGE PROCESSOR)
OSC 1
X2001
(27MHz)
OSC
VIDEO MUTE
27MHz CLOCK
H-SYNC
V-SYNC
RESET
DSP XF
I
2
C SERIAL CLOCK
I
2
C SERIAL DATA
51
33
SD C.B.A.
40
37
36
35
131
(VIDEO AMP)
4
IC2214
1
16
13
2
P2001
SD RESET(L)
SD CS(L)
SD READY(L)
SERIAL DATA 1
SERIAL DATA 0
SERIAL CLOCK
55
30
31
75
68
74
8
P2001
12
P2001
9
P2001
10
P2001
13
P2001
11
P2001
EM CS 0
48
RESET
IC2009
1
2
TO SYSTEM
CONTROL
BLOCK
DIAGRAM
SD VIDEO
SD RESET(L)
SD CS(L)
SD READY(L)
SERIAL DATA 1
SERIAL DATA 0
SERIAL CLOCK
1
3
7
6
IC2004
(BUFFER)
NOT USED
+D3.3V
(FLASH MEMORY)
EM 0E
EM WE
RESET(L)
RY-BY
EM CS 0
37
VCC(+3.3V)
12
15
IC2205
11
26
28
36
16
38
45
1
9
25
48
216
7
P2401
8
P2401
9
P2401
1
P2401
12
P2401
10
P2401
2
P2401
5
P2401
SD
CONNECTOR
29
DQ(0-15)
A(0-19)
(SD INTERFACE)
27MHz CLOCK
EM OE
EM WE
SD RESET
EM CS 3
SD IRQ
29
33
36
22
27
26
31
34
35
28
VCC(+3.3V)
SDDAT0
SDDAT1
SDDAT2
SDDAT3
SDCLK
SDWP
SDCD
SDCMD
2
19
IC2406
1
24
21
18
41
47
48
3
MND(0-15)
MNA(0-7)
VCC(+3.3V)
+D3.3V
30
VCC(+3.3V)
4
6
7
9
17
1
256
232
235
238
245
247
254
226
222
219
118
4
2
1
F/F
IC2008
5
+D3.3V
VCC
(+3.3V)
BURST
CODEC
OSD
80
88
91
89
97
93
98
39
99
134
162
161
159
152
150
149
146
145
199
196
194
183
135
136
137
138
143
144
200
+1.8V
SDRAM RAS
SDRAM CAS
SDRAM WE
SDRAM CS0
SDRAM CKE
SDRAM DQMLH
SDRAM DQMLL
SDRAM CLOCK
(128M SDRAM)
17
16
IC2001
18
19
37
39
15
38
13
29
42
53
20
26
35
2
DQ(0-15)
A(0-14)
(DIGITAL VIDEO ENCODER)
23
21
IC2213
36
18
17
32
44
38
41
35
47
25
I
2
C BUS
INTERFACE
SYNC
GENERATOR
DUMUX
INTERPOLATING
FILTER
INTERPOLATING
FILTER
CGMS
GEN.
CC
GEN.
MODULATOR
SUB CARRIER
GENERATOR
OFFSET
cb
cr
Y
1
LPF
DAC
DRIVE
22
43
3
6
9
12
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
+D3.3V
+D3.3V
+D3.3V
+A3.3V
+A5V
VCC(+5V)
VCC(+5V)
TP2201
BUFFER
Q2211
Q2001
V-REF
SDRAM RAS
SDRAM CAS
SDRAM WE
SDRAM CS0
SDRAM CKE
SDRAM DQMLH
SDRAM DQMLL
SDRAM CLOCK
1
3
9
14
43
49
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
VCC(+3.3V)
27
VCC(+3.3V)
VCC(+1.8V)
VCC(+3.3V)
5,21,42,78,116,128,
129,148,172,208,214,
236
8,29,46,65,71,85,100,
139,160,178,195,221,
246
OSC 2
130
UNSW+5V
Q1303
(FROM IC6001(57))
SD POWER ON(H)
UNSW+3.3V
Q1304
Q1302
Q1301
PR1301
PR1302
IC2007
2
3 +1.8V
REGULATOR
+A5V
+D3.3V
+A3.3V
+1.8V
TO VIDEO
BLOCK
DIAGRAM
SD VIDEO SIGNAL
ARM D(0-15)
ARM A(0-19)
VIDEO
INTERFACE
84
86
Y DATA(0-7)
C DATA(0-7)
47
33
SDR DQ(0-15)
SDR A(0-14)
A
D
E
F
B
G
C
H
A
2 V
20 ns
3.7Vp-p
1 V
20 µs
V1
3.3Vp-p
V1
B
1 V
5 ms
V1
3.3Vp-p
C
D
1 V
2 µs
V1
4.4Vp-p
E
1 V
40 µs
V1
3.3Vp-p
1 V
100 ns
V1
3.3Vp-p
F
1 V
20 µs
V1
1.2Vp-p
G
1 V
20 µs
V1
1.8Vp-p
H
SD BLOCK DIAGRAM (Model : PV-D4763S-K)
SD BLOCK DIAGRAM
PV-D4763S-K
Summary of Contents for PV-D4733S-K
Page 15: ...R1522 ERJ6GEYJ103V MGF CHIP 1 10W 10K 15 ...
Page 45: ...Fig 16 1 Fig 16 2 6 1 4 2 REMOVAL OF CSP IC Fig 16 3 45 ...
Page 46: ...6 1 4 3 INSTALLATION OF CSP IC Fig 16 4 46 ...
Page 47: ...Fig 16 5 47 ...
Page 48: ...6 1 4 4 CSP IC LOCATION Fig 16 6 48 ...
Page 134: ...Fig D2 22 ...
Page 139: ...5 2 2 Inner Parts Location Fig J1 1 27 ...
Page 140: ...5 2 3 EJECT Position Confirmation Fig J1 2 28 ...
Page 147: ...5 2 8 Capstan Motor Unit Fig J6 5 2 9 T Loading Arm Unit and S Loading Arm Unit Fig J7 1 35 ...
Page 152: ...5 3 CASSETTE UP ASSEMBLY SECTION 5 3 1 Top Plate Wiper Arm Unit and Holder Unit Fig K1 1 40 ...
Page 168: ...10 2 MECHANISM BOTTOM SECTION 56 ...
Page 169: ...10 3 CASSETTE UP COMPARTMENT SECTION 57 ...
Page 170: ...10 4 CHASSIS FRAME AND CASING PARTS SECTION 58 ...
Page 171: ...10 5 PACKING PARTS AND ACCESSORIES SECTION 59 ...
Page 187: ...75 ...
Page 192: ...80 ...
Page 194: ...82 ...
Page 202: ...90 ...