209
8-7. Special Data Registers
Address
Name
Description
DT9121 High-speed counter
board status
monitor area
■
Construction of DT9121
The status of the high-speed counter board can be monitored in this area.
*1. Output disable input:
This input disables external output even if the high-speed counter is set to the
output enable mode by DT9120. While this input is turned ON, the output of
the high-speed counter board is not changed even if the elapsed value becomes
equal to the target.
*2. Error codes
A BCD error is detected only when data
for the high-speed counter board is set to
BCD operation using F0 (MV) and bit
position 7 of DT9120.
11
8
3
0
15
•
•
12
•
•
•
•
7
4
•
•
Bit position
Data
CH0 Flag bit for “reset enable input
(RST.E0 terminal)”
[1: ON (reset enabled)]
CH0 Flag bit for “output disable input
(O.INH0 terminal)”
*
1
0: OFF (output enabled)
1: ON (output disabled)
CH1 Flag bit for “reset enable input
(RST.E1 terminal)”
[1: ON (reset enabled)]
0 0
CH0 This flag turns ON when
“Target 0 = elapsed value”
CH0 This flag turns ON when
“Target 1 = elapsed value”
Error code
*
2
Error flag
(1: an error occurs)
0
CH1 This flag turns ON when
“Target 0 = elapsed value”
CH1 This flag turns ON when
“Target 1 = elapsed value”
CH1 Flag bit for “output disable input
(O.INH1 terminal)”
*
1
0: OFF (output enabled)
1: ON (output disabled)
Bit position
Description
11
0
0
0
1
10
0
0
1
0
9
0
1
0
0
8
1
0
0
0
BCD error
CH0 overflow/underflow
CH1 overflow/underflow
Watchdog timer error
Summary of Contents for FP-M Hardware
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