Oki Dr.63514, User Manual, Page: 52 / 101

Chapter 2. Functions
2-31
2.6.2 Cycle Counter
The 24-bit cycle counter tracks the machine cycles of each instruction executed as a yardstick to user
application program execution times.
Cycle counter
control circuit
Machine
cycle signal
Cycle counter
overflow
break request
Cycle
counter
Cycle count
signal
Program counter
output
Figure 2-10 Cycle Counter
This counter offers three modes of operation.
•
Count disabled
•
Free-running count
•
Trigger count
(1) Count disabled
No instructions are counted.
(2) Free-running count
Instructions are counted for all code memory addresses.
(3) Trigger count
All instructions between start and stop triggers based on code memory addresses are counted. There
are three possible trigger combinations:
a. Specifying both a start and stop address
Counting starts when real-time emulation visits the former and stops when the program counter
(PC) hits the latter.
b. Specifying a start address only
Counting starts when real-time emulation visits the former and continues until there is a break.
c. Specifying a stop address only
Counting starts simultaneously with real-time emulation and stops when the program counter
(PC) hits the latter.