Oki Dr.63514, User Manual, Page: 39 / 101

Chapter 2. Functions
2-18
break of this type is not until the next overflow.
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(3) Cycle counter overflow break
If these breaks are enabled, overflow during real-time emulation of the cycle counter, a 24-bit counter
summing the machine cycles for instructions executed produces a break request of this type.
Cycle counter
(24-bit counter)
Cycle counter
overflow break request
Cycle count signal
n
Note 3
n
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Resuming real-time emulation after this break automatically cancels this request. The next
break of this type is not until the next overflow.
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n
Note 4
n
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The cycle counter value after the break varies between one and the execution time of the
instruction producing the overflow. It is always 1 for a single-cycle instruction, but could be 1,
2, or 3 for a 3-cycle one.
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(4) External break
If these breaks are enabled, a rising edge in the probe cable break (EXT.BRK) input during real-time
emulation produces a break request of this type.
The signal uses VDD, the positive power supply voltage, for its “H” level.
EXT.BRK
(Probe cable)
51K
Ω
External break
request
Rising edge
detection
circuit
Voltage
conversion
circuit
n
Note 5
n
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The external break request and acceptance coincide with the beginning and end of an
instruction S2 cycle.