UM10800
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© NXP Semiconductors N.V. 2016. All rights reserved.
User manual
Rev. 1.2 — 5 October 2016
130 of 487
NXP Semiconductors
UM10800
Chapter 9: LPC82x General Purpose I/O (GPIO)
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Writing ones to a port’s CLR register clears output bits.
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Writing ones to a port’s NOT register toggles/complements/inverts output bits.
The state of a port’s output bits can be read from its SET register. Reading any of the
registers described in
returns the state of pins, regardless of their direction
or alternate functions.
9.6.3 Masked I/O
A port’s MASK register defines which of its pins should be accessible in its MPORT
register. Zeroes in MASK enable the corresponding pins to be read from and written to
MPORT. Ones in MASK force a pin to read as 0 and its output bit to be unaffected by
writes to MPORT. When a port’s MASK register contains all zeros, its PORT and MPORT
registers operate identically for reading and writing.
Applications in which interrupts can result in Masked GPIO operation, or in task switching
among tasks that do Masked GPIO operation, must treat code that uses the Mask register
as a protected/restricted region. This can be done by interrupt disabling or by using a
semaphore.
The simpler way to protect a block of code that uses a MASK register is to disable
interrupts before setting the MASK register, and re-enable them after the last operation
that uses the MPORT or MASK register.
More efficiently, software can dedicate a semaphore to the MASK registers, and
set/capture the semaphore controlling exclusive use of the MASK registers before setting
the MASK registers, and release the semaphore after the last operation that uses the
MPORT or MASK registers.
9.6.4 GPIO direction
Each pin in a GPIO port can be configured as input or output using the DIR registers. The
direction of individual pins can be set, cleared, or toggled using the DIRSET, DIRCLR, and
DIRNOT registers.
9.6.5 Recommended practices
The following lists some recommended uses for using the GPIO port registers:
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For initial setup after Reset or re-initialization, write the PORT registers.
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To change the state of one pin, write a Byte Pin or Word Pin register.
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To change the state of multiple pins at a time, write the SET and/or CLR registers.
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To change the state of multiple pins in a tightly controlled environment like a software
state machine, consider using the NOT register. This can require less write operations
than SET and CLR.
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To read the state of one pin, read a Byte Pin or Word Pin register.
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To make a decision based on multiple pins, read and mask a PORT register.