Novametrix Medical Systems OXYPLETH 520A, Service Manual

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2471 & 2775 Main Board
5-Jun-01 Model 520A Service Manual
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PRELIMINARY
The ROM at IC17 is read when its Chip Enable line (IC17 pin 22) is brought low
by the ROMCS* signal at IC25 pin 3, and the processor brings its Read line (IC16
pin 63) low—thereby activating the ROM Output Enable line at IC17 pin 24. Under
these conditions, ROM data from the specified address bus location is made
available to the data bus for use by the processor.
The RAM (IC20) is activated when its Chip Select line RAMCS* (IC20 pin 20) is
brought low, via IC25 pin 8. When the ME* line at IC25 pin 5 is low, and the
inverse of address line A17 at IC25 pin 4 is low, output pin 6 of IC25 will go low.
This in turn will drive IC25 pin 10 low, with PWRON* low at IC25 pin 9, IC25 pin
8 will be low (RAMCS*). If at that time, OE (IC20 pin 22) is low, a RAM Read
occurs, whereas a RAM Write will occur if WE (IC20 pin 27) is low.
Real Time Clock (RTC)
9.3.16
A Real Time Clock provides the Model 520A the ability to time stamp collected
(printed) trend data. (See sheet 4 on 2471 schematic, sheet 3 on 2775 schematic.)
The 32.768 kHz crystal, Y3, provides the timing signals for the clock chip, IC24,
which is powered from the VBACK supply so that the clock can continue to keep
time when the monitor is turned off (provided the monitor’s 12 volt internal battery
is connected and maintains at least a nominal charge).
The RTC is activated when its Chip Select line (CS0*) at IC24 pin 2 is brought low.
With the monitor on PWRON* will be low (IC25 pin 13), the RTC* line will be
brought low by the processor through IC22 pin 14, these lines drive RTCCS (Real
Time Clock Chip Select IC25 pin 11) low. If at this time, the RD* (IC24 pin 8) input
is low, a RTC Read occurs, whereas a RTC Write will occur if the WR* (IC24 pin
10) input is low. Addressing is handled by A0-A3 (pins 4-7) and data I/O through
D0-D3 (pins 14-11).
Sound generator
9.3.17
The programmable tone controller IC27 is replaced with the Tone Generator
Replacement board 2755-01, this is used to drive the monitor’s audio circuit. The
tone generator is clocked by IC39 pin9 from the 1.638 MHz signal, Q1. The tone
generator is enabled by the processor when IC22 pin12 is brought low. While CE*
is low, WR* is brought low and data bus information including frequency (pitch)
and attenuation (volume) is accepted by the tone generator. The Ready signal (IC27
pin 4) goes low while accepting data and the processor is put into a Wait state until
IC27 finishes its task; then Ready returns high and the processor continues its
operations.
The AUDOUT output at IC27 pin 7 drives the audio amplifier IC26. The amplifier
output is coupled through capacitors C55 and brought to J109 as the SNDOUT
(Sound Out) line. The speaker which is mounted in the chassis is connected to J109,
LS1 is not installed on the 2471 Main Board.