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PAMS
Technical Documentation
NSE–5
System Module
Page 2 – 50
Issue 1 07/99
MCU Memory Map
MAD2PR1 supports maximum of 4GB internal and 4MB external address
space. External memories use address lines MCUAd0 to MCUAd21 and
8–bit/16–bit databus. The BUSC bus controller supports 8– and 16–bit
access for byte, double byte, word and double word data. Access wait
states (0, 1 or 2) and used databus width can be selected separately for
each memory block.
Table 15. MCU Memory map
Memory block
Chip select
Start address
Stop address
Size
Size
boot ROM (*)
internal
0000 0000
0000 FFFF
64k
64k
API RAM
internal
0001 0000
0001 FFFF
64k
64k
System logic
internal
0002 0000
0002 FFFF
64k
64k
API ctl reg.
internal
0003 0000
0003 FFFF
64k
64k
Bus Controller Internal
0004 0000
0007 FFFF
256k
256k
The same as
0–7FFFF
0008 0000
000F FFFF
512 k
512 k
ext. RAM (*)
RAMSelX
0010 0000
001F FFFF
1M
1M
ext. ROM1
ROM1SelX
0020 0000
005F FFFF
4M
4M
(ext.
ROM2sel is in
flexpool in
MAD2PR1)
144pin (*)
(ROM2SelX)
(0060 0000)
(009F FFFF)
(4M)
(4M)
(ext. EE-
PROM is in
flex pool in
MAD2PR1)
(EEPROMSelX)
(00A0 0000)
(00DF FFFF)
(4M)
(4M)
reserved
00E0 0000
00FF FFFF
4M
4M
The same as
0–FF FFFF
0100 0000
FFFF FFFF
4G –
16 M
4G –
16 M
(*) After reset and when BootROMDis and ROM2Boot are low.
MCU can boot from different memory locations, depending on hardware
(GenSDIO0) and software settings.
Table 16. MCU boot memory selection
Start
address
Stop
address
BootROMDis=0
ROM2Boot=0
BootROMDis=1
ROM2Boot=0
BootROMDis=0
ROM2Boot=1
BootROMDis=1
ROM2Boot=1
0000
0000
0000
FFFF
boot ROM
External RAM ext. ROM2
External RAM
Summary of Contents for NSE-5 Series
Page 15: ...NSE 5 Series Transceivers PAMS Technical Documentation Issue 1 07 99 Chapter 2 System Module...
Page 97: ...PAMS Technical Documentation Issue 1 07 99 Mechanical Assembly...
Page 195: ...NSE 5 Series Transceivers PAMS Technical Documentation Issue 1 07 99 Service Tools...
Page 219: ...PAMS Technical Documentation NSE 5 Series Transceivers Issue 1 07 99 Disassembly Instructions...
Page 227: ...NSE 5 Series Transceivers PAMS Technical Documentation Issue 1 07 99 Troubleshooting...
Page 267: ...PAMS Technical Documentation Original 11 97 HFU 2 Handsfree Unit...
Page 316: ...NSE 5 Schematics Layouts V13 A 2 Page Draft 05 RF and BB Interconnections...
Page 317: ...NSE 5 Schematics Layouts V13 A 3 Page Draft 05 Baseband Block...
Page 318: ...NSE 5 Schematics Layouts V13 A 4 Page Draft 05 Audio...
Page 319: ...NSE 5 Schematics Layouts V13 A 5 Page Draft 05 CPU...
Page 320: ...NSE 5 Schematics Layouts V13 A 6 Page Draft 05 Infrared Module...
Page 321: ...NSE 5 Schematics Layouts V13 A 7 Page Draft 05 Power...
Page 323: ...NSE 5 Schematics Layouts V13 A 9 Page Draft 05 CRFU3...
Page 324: ...NSE 5 Schematics Layouts V13 A 10 Page Draft 05 PA...
Page 325: ...NSE 5 Schematics Layouts V13 A 11 Page Draft 05 SUMMA...
Page 326: ...NSE 5 Schematics Layouts V13 A 12 Page Draft 05 Component Layout Top...
Page 327: ...NSE 5 Schematics Layouts V13 A 13 Page Draft 05 Component Layout Bottom...