APPENDIX A MIPS III INSTRUCTION SET DETAILS
526
Preliminary User’s Manual S15543EJ1V0UM
MACC
Multiply and Accumulate (5/5)
MACC
64, sat=1, hi=0, us=0 (MACCS instruction)
T:
temp1
←
((GPR[rs]
31
)
32
|| GPR[rs]) * ((GPR[rt]
31
)
32
|| GPR[rt])
temp2
←
saturation(temp1 + (HI
31..0
|| LO
31..0
))
LO
←
((temp2
63
)
32
|| temp2
63..32
)
HI
←
((temp2
31
)
32
|| temp2
31..0
)
GPR[rd]
←
LO
64, sat=1, hi=0, us=1 (MACCUS instruction)
T:
temp1
←
(0
32
|| GPR[rs]) * (0
32
|| GPR[rt])
temp2
←
saturation(temp1 + (HI
31..0
|| LO
31..0
))
LO
←
((temp2
63
)
32
|| temp2
63..32
)
HI
←
((temp2
31
)
32
|| temp2
31..0
)
GPR[rd]
←
LO
64, sat=1, hi=1, us=0 (MACCHIS instruction)
T:
temp1
←
((GPR[rs]
31
)
32
|| GPR[rs]) * ((GPR[rt]
31
)
32
|| GPR[rt])
temp2
←
saturation(temp1 + (HI
31..0
|| LO
31..0
))
LO
←
((temp2
63
)
32
|| temp2
63..32
)
HI
←
((temp2
31
)
32
|| temp2
31..0
)
GPR[rd]
←
HI
64, sat=1, hi=1, us=1 (MACCHIUS instruction)
T:
temp1
←
(0
32
|| GPR[rs]) * (0
32
|| GPR[rt])
temp2
←
saturation(temp1 + (HI
31..0
|| LO
31..0
)
LO
←
((temp2
63
)
32
|| temp2
63..32
)
HI
←
((temp2
31
)
32
|| temp2
31..0
)
GPR[rd]
←
HI
Exceptions:
None