Preliminary User’s Manual S15543EJ1V0UM
23
CHAPTER 1 INTRODUCTION
The
µ
PD98502 is a high performance controller, which can perform the protocol conversion between IP Packets
and ATM Cells, which is especially suitable for ADSL router. It includes high performance MIPS
based 64-bit RISC
processor V
R
4120A CPU core, ATM Cell Processor, Ethernet Controller, USB Controller Block, PCI Controller Block,
UTOPIA2 interface and SDRAM interface.
1.1 Features
•
Includes high performance MIPS based 64-bit RISC processor V
R
4120A
•
Can perform RTOS and network middleware (M/W) on the chip
•
Includes interface for PROM and flash ROM used for storing boot program
•
Includes 32-bit RISC controller in ATM Cell Processor
•
Software SAR processing by RISC controller affords flexibility for specification update
•
Supports CBR/VBR/UBR service classes
•
Includes 2-channel 10/100-Mbps Ethernet controller compliant to IEEE802.3, IEEE 802.3u and IEEE802.3x
•
Can directly connect external Ethernet PHY device through 3.3 V MII interface
•
Includes USB full speed function controller compliant to USB specification 1.1
•
Supports operation conforming to the USB Communication Device Class Specification
•
Can directly connect 64-Mbit and 128-Mbit SDRAM as external memory
•
Includes 32-bit 33-MHz PCI Bus Master compliant to PCI Specification Rev. 2.2
•
Includes 8-bit 16.5/25/33-MHz UTOPIA level 2 interface compliant to ATM Forum af-phy-0039
•
Includes boundary scan function (JTAG) compliant to IEEE 1149.1
•
Includes Micro Wire interface
•
Includes 2-ch general purpose timers
•
Using advanced CMOS technology
•
Power supply 2.5V(Core)/3.3V(I/O)
•
Package 500-pin T-BGA
1.2 Ordering Information
Part Number
Package
µ
PD98502N7-H6
500-pin Tape BGA (Heat spread type) (40
×
40)