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CHAPTER 22
µ
PD78F0852
Preliminary User’s Manual U14581EJ3V0UM00
22.1 Memory Size Switching Register (IMS)
The
µ
PD78F0852 allows users to select the internal memory capacity using the memory size switching register
(IMS) so that the same memory map as that of the mask ROM version with a different size of internal memory capacity
can be achieved.
IMS is set with an 8-bit memory manipulation instruction.
RESET input sets IMS to CFH.
Figure 22-1. Memory Size Switching Register (IMS) Format
Address: FFF0H After Reset: CFH R/W
Symbol
7
6
5
4
3
2
1
0
IMS
RAM2
RAM1
RAM0
0
ROM3
ROM2
ROM1
ROM0
RAM2
RAM1
RAM0
Internal High-Speed RAM Capacity Selection
1
1
0
1,024 bytes
Other than above
Setting prohibited
ROM3
ROM2
ROM1
ROM0
Internal ROM Capacity Selection
1
0
0
0
32 Kbytes
1
0
1
0
40 Kbytes
Other than above
Setting prohibited
The IMS settings to obtain the same memory map as the mask ROM version are shown in Table 22-2.
Table 22-2. Memory Size Switching Register Settings
Mask ROM Version
IMS Setting
µ
PD780851(A)
C8H
µ
PD780852(A)
CAH
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