NEC mPD780851, Preliminary User'S Manual

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CHAPTER 6 16-BIT TIMER 0 TM0
Preliminary User’s Manual U14581EJ3V0UM00
6.6 16-Bit Timer 0 TM0 Cautions
(1) Timer start errors
An error with a maximum of one clock may occur until counting is started after timer start. This is because the
16-bit timer register (TM0) is started asynchronously with the count pulse.
Figure 6-10. 16-Bit Timer Register Start Timing
TM0 count value
0000H 0001H 0002H 0004H
Count pulse
Timer start
0003H
(2) Capture register data retention timings
If the valid edge of the TI0n/P4n pin is input during 16-bit capture register 0n (CR0n) read, CR0n performs capture
operation, but the capture value is not guaranteed. However, the interrupt request flag (INTTM0n) is set upon
detection of the valid edge.
Figure 6-11. Capture Register Data Retention Timing
Count pulse
TM0 count value
Edge input
Interrupt request flag
Capture read signal
CR0n interrupt value
N
−
1 N + 1 M
−
3 M
−
2 N N
−
2 N
−
3 M
−
1 M M + 1 M + 2 M + 3
X N N
Capture operation
Remark n = 0 to 2
(3) Valid edge setting
Set the valid edge of the TI0n/P4n pin after setting bit 2 (TMC02) of the 16-bit timer mode control register (TMC0)
to 0, and then stopping timer operation. Valid edge setting is carried out with bits 2 to 7 (ESn0 and ESn1) of
the prescaler mode register (PRM0).
Remark n = 0 to 2