NEC mPD178053, User Manual

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CHAPTER 3 CPU ARCHITECTURE
User’s Manual U15104EJ2V0UD
3.2.2 General-purpose registers
The general-purpose registers are mapped at particular address FEE0H to FEFFH in the data memory. They
consist of 4 banks, each bank consisting of eight 8-bit registers (X, A, C, B, E, D, L, and H).
Each register can be used as an 8-bit register and two 8-bit registers can be used in pairs as a 16-bit register (AX,
BC, DE, and HL).
They can be written with function names (X, A, C, B, E, D, L, H, AX, BC, DE, and HL) and absolute names (R0
to R7 and RP0 to RP3).
Register banks to be used for instruction execution are set with the CPU control instruction (SEL RBn). Because
of the 4-register bank configuration, an efficient program can be created by switching between a register for normal
processing and a register for interrupt for each bank.
Table 3-3. Absolute Address of General-Purpose Registers
Bank Register Absolute
Function Name Absolute Name
Address
BANK0 H R7 F E F F H
L R6 F E F E H
D R5 F E F D H
E R4 F E F C H
B R3 F E F B H
C R2 F E F A H
A R1 F E F 9 H
X R0 F E F 8 H
BANK1 H R7 F E F 7 H
L R6 F E F 6 H
D R5 F E F 5 H
E R4 F E F 4 H
B R3 F E F 3 H
C R2 F E F 2 H
A R1 F E F 1 H
X R0 F E F 0 H
Bank Register Absolute
Function Name Absolute Name
Address
BANK2 H R7 F E E F H
L R6 F E E E H
D R5 F E E D H
E R4 F E E C H
B R3 F E E B H
C R2 F E E A H
A R1 F E E 9 H
X R0 F E E 8 H
BANK3 H R7 F E E 7 H
L R6 F E E 6 H
D R5 F E E 5 H
E R4 F E E 4 H
B R3 F E E 3 H
C R2 F E E 2 H
A R1 F E E 1 H
X R0 F E E 0 H