3.4.7 Corner Purity Compensation Circuit Failure
NG
Adjust the corner purity by OSM control.
Expected failure point
IC102
OK
OK
NG
Confirm that the voltage at Pins 49 (TR), 50 (TL), 51 (BR) and 52 (BL)
of IC102 on the MAIN PWB are variable by OSM control.
Good
NG
OK
Expected failure point
1) (TR): The corner purity coil of Pin 2 of CN801
2) (TL): The corner purity coil of Pin 4 of CN801
3) (BR): The corner purity coil of Pin 6 of CN801
4) (BL): The corner purity coil of Pin 8 of CN801
Expected failure point
IC801 or IC803
(TR): Confirm that the output voltage at Pin 8 of IC803 is variable by OSM control.
(TL): Confirm that the output voltage at Pin 2 of IC803 is variable by OSM control.
(BR): Confirm that the output voltage at Pin 8 of IC801 is variable by OSM control.
(TL): Confirm that the output voltage at Pin 2 of IC801 is variable by OSM control.
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Summary of Contents for DPro2070SB
Page 22: ...1 15 Fig 7 The principle of DDCC compensation ...
Page 23: ...1 16 Fig 8 a DDCC adjustment item ...
Page 24: ...1 17 Fig 8 b DDCC adjustment item ...
Page 25: ...1 18 Fig 9 DDCC circuit diagram ...
Page 103: ...4 Wave form 1 POWER 2 CONTROL MAIN 3 DEFL MAIN 4 DEFL SUB COIL DRIVE MAIN 5 VIDEO ...