1- 6
1.3 Video block
1.3.1 Video signal amplifier circuit
IC 211
Pre - Amp
IC212
OSD
D-SUB
CN216
MPU
IC102
18
10
6
11
9
3
1
25
27
29
18
19
17
IC 210
MAIN
Amp
11
9
8
G
R
B
3
2
1
G
R
B
BIAS circuit
21
19
20
DAC
R-Bias
DAC
G-Bias
DAC
B-Bias
15
DAC
S/G SEL
16
17
13
14
35
43
44
SCL
SDA
CLP-IN
Retrace
BLK in
B OSD
R OSD
G OSD
8
3
2
1
6
4
2
14
12
10
25
28
31
40
2
13
D-SUB
CN215
IC 216
Analog-sw
G
R
B
G
R
B
SEL
23
16
OSD BLK
IC 601
11
DET
10
13
IC 215
1
3
5
G
R
B
Fig. 4 Video signal amplifier circuit
1.3.1.1 Video clamp
The clamp signal (positive polarity, 3.3 Vo-p) output from pin 35 of the MPU (IC102) is input to pin 13 of
IC211. The clamp signal is normally set to the back of the video signal (clamp position of OSM menu:
BACK). To correspond to the Sync on Green signal, the clamp signal can be set to the front of the video
signal (clamp position of OSM menu: FRONT). If the signal is a separate signal, changing the clamp
position of the OSM menu to FRONT or BACK will not change anything.
1.3.1.2 Video blanking
The horizontal/vertical retrace line (blanking) signal (positive polarity, 3.3 Vo-p) output from pin 40 of IC601
is input to pin 13 of IC215. IC215 reverses the polarity and amplifies the waveform (positive polarity,
3.3Vo-p -> negative polarity, 5.0Vo-p), and then reverses the polarity again (negative polarity, 5.0Vo-p ->
positive polarity, 5.0Vo-p) to output the blanking signal. This blanking signal is input to pin 14 of IC211 to
perform blanking operation during horizontal/vertical retracing operation.
To perform image blanking at switching the signal mode or at turning ON or OFF the power, the contrast
and the brightness will be set to MINIMUM.
1.3.1.3 Video mixing/amplifying
IC211 mixes the video signal with the OSM signal (G, R, and B signals of pins 9, 10, and 11) and with the
video blanking signal described in Sec. 1.3.1.2. I2C bus (pins 16 and 17 of SCL and SDA) fixes the black
level of the mixed video signal to 1.8V, and amplifies the mixed video signal (0.7Vp-p -> approx. 2.6Vp-p).
After that, the B, R, and G signals are output from pins 25, 27, and 29, respectively. The video signal
output from IC211 is input to IC210, where the signal is amplified (approx. 2.6Vp-p -> approx. 36Vp-p),
and the black level is fixed to 67V. After that, the B, R, and G signals are respectively output from pins 1, 3,
and 5.
1.3.1.4 Control of contrast and white balance
The MPU (IC102) sends the 8-bit contrast/white balance control data to IC211 with I2C bus (SCL, SDA
line). The contrast data simultaneously control 3 channels to simultaneously control the gains of the R, G,
and B, and the white balance data respectively controls the gains of the R, G, and B.
Summary of Contents for DPro2070SB
Page 22: ...1 15 Fig 7 The principle of DDCC compensation ...
Page 23: ...1 16 Fig 8 a DDCC adjustment item ...
Page 24: ...1 17 Fig 8 b DDCC adjustment item ...
Page 25: ...1 18 Fig 9 DDCC circuit diagram ...
Page 103: ...4 Wave form 1 POWER 2 CONTROL MAIN 3 DEFL MAIN 4 DEFL SUB COIL DRIVE MAIN 5 VIDEO ...