CHAPTER 5 CLOCK GENERATORS
Preliminary User’s Manual U16898EJ1V0UD
65
5.3 Registers Controlling Clock Generators
The clock generators are controlled by the following five registers.
•
Processor clock control register (PCC)
•
Preprocessor clock control register (PPCC)
•
Low-speed Ring-OSC mode register (LSRCM)
•
High-speed Ring-OSC mode register (HSRCM)
•
Oscillation stabilization time select register (OSTS)
(1) Processor clock control register (PCC) and pre-processor clock control register (PPCC)
These registers are used to specify the division ratio of the system clock.
PCC and PPCC are set by using a 1-bit or 8-bit memory manipulation instruction.
Reset input sets PCC and PPCC to 02H.
Figure 5-2. Format of Processor Clock Control Register (PCC)
Address: FFFBH, After reset: 02H, R/W
Symbol
7 6 5 4 3 2 1 0
PCC 0 0 0 0 0 0
PCC1
0
Figure 5-3. Format of Preprocessor Clock Control Register (PPCC)
Address: FFF3H, After reset: 02H, R/W
Symbol
7 6 5 4 3 2 1 0
PPCC 0 0 0 0 0 0
PPCC1
PPCC0
PPCC1
PPCC0
PCC1
Selection of CPU clock (f
CPU
)
0
0
0
f
X
0
1
0
f
X
/2
Note 1
0
0
1
f
X
/2
2
1
0
0
f
X
/2
2
Note 2
0
1
1
f
X
/2
3
Note 1
1
0
1
f
X
/2
4
Note 2
Other than above
Setting prohibited
Notes 1. If PPCC = 01H, the clock (f
XP
) supplied to the peripheral hardware is f
X
/2.
2. If PPCC = 02H, the clock (f
XP
) supplied to the peripheral hardware is f
X
/2
2
.
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