3-8
MS-9185 Server Board
B
Memory Controller Options
DRAM Bank Interleave
Interleaved memory is system memory divided into two or more sections.
Setting to [Enabled] allows memory to be accessed faster since each sec-
tion of memory is capable of being utilized at once.
Node Interleave
AMD Opteron CPU supports a mode called node interleave. W hen node
interleave is
disabled
, the memory controller maps the local memory of
each processor to a single contiguous range of physical addresses. This
allows the operating system to map user data to local memory, whenever
possible, to allow programs to access data the most rapidly. W hen node
interleave is
enabled
, physical addresses are partitioned into 4KB blocks,
and alternated among the processors. The operating system is then unable
to use NUMA optimizations, and the memory space is treated as if the system
were an SMP system.
SW Mem Hole Remapp
This setting enables the software to remap the physical memory to an ad-
dress higher than 00E0.
ACPI SRAT Table
The Static Resource Affinity Table (SRAT) can be used to describe the
physical location of processors and memory in large-scale systems (such
as CC-NUMA) to the Microsoft W indows Server 2003 operating system,
allowing threads and memory to be grouped in an optimal manner.
Summary of Contents for K9SD Master
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