Canopy
T1/E1
Multiplexer
September
2004
T1/E1
Multiplexer
FPGA
Version
3.4
Page
69 of 73
Desired Action
Syntax, Response, and Description
Get the timing mode Enter
get clock source
The system responds
Clock source set to [loopback/recovered]
Gets the T1 timing mode. This timing mode applies for all four T1 lines.
Loopback mode means to take the T1 Tx clock and loop it back to the
T1 Rx. Recovered mode means to recover the T1 clock from the
incoming T1 over Ethernet bit stream, in other words to recover the
clock from the far end T1.
Get the master
clock reference line
Enter
get master clock reference line
The system responds
Clk ref line: [1/2/3/4]
NOTE:
[1/2/3/4]
represents T1/E1 ports 1 through 4.
Displays the T1 master clock reference line. This clock reference
applies for all four T1 lines.
Get the secondary
clock reference line
Enter
get secondary clock reference line
The system responds
Backup clk ref line; [1/2/3/4]
NOTE:
[1/2/3/4]
represents T1/E1 ports 1 through 4.
Displays the T1/E1 secondary or backup clock reference line. This
clock reference is the backup clock reference for all four T1/E1 lines.
The backup clock reference will become active only when the master
clock reference line is unavailable.
Issue
3
