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383
FX
3G
/FX
3U
/FX
3UC
Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
13 High-Speed Processing – FNC 50 to FNC 59
13.10 FNC 59 – PLSR / Acceleration/Deceleration Setup
11
FN
C30
-FN
C3
9
R
ota
tion and
Shi
ft
12
FN
C40-FN
C49
D
ata O
perati
on
13
FNC
50-FNC
59
High-Speed
Proc
essing
14
FM
C60-FN
C69
H
andy
In
struction
15
FN
C70-FN
C79
E
xternal
F
X
I/O
De
vice
16
FNC
80-FNC
89
External
FX
Dev
ice
17
FNC1
00-
FNC10
9
Dat
a
Transfer 2
18
FNC1
10-
FNC139
Fl
oa
ting Poi
nt
19
FNC14
0-F
N
C
149
Da
ta
Operation 2
20
FNC1
50-
FNC159
Pos
itioning
Control
13.10 FNC 59 – PLSR / Acceleration/Deceleration Setup
Outline
This pulse output instruction has the acceleration/deceleration function.
1. Instruction format
2. Set data
3. Applicable devices
S
1: Specify a transistor output on the main unit or Y000 or Y001 on a special high-speed output adapter
*1
.
S
2: This function is supported only in FX
3U
/FX
3UC
PLCs.
*1. High-speed output special adapters can be connected only to FX
3U
PLC.
Explanation of function and operation
1. 16-bit operation (PLSR)
Pulses are output from output (Y)
by the specified number
with acceleration/deceleration to the
maximum frequency
over the time
(ms).
: Maximum frequency (Hz)
Allowable setting range: 10 to 32767 (Hz)
: Total number of output pulses (PLS)
Allowable setting range
FX
3G
: 110 to 32767(PLS)
FX
3U
/X
3UC
: 1 to 32767(PLS)
: Acceleration/deceleration time (ms)
Allowable setting range: 50 to 5000 (ms)
: Pulse output number
Allowable setting range: Y000, Y001
Operand Type
Description
Data Type
Maximum frequency (Hz)
16- or 32-bit binary
Total number of output pulses (PLS)
16- or 32-bit binary
Acceleration/deceleration time (ms)
16- or 32-bit binary
Device number (Y) from which pulses are to be output
Bit
Oper-
and
Type
Bit Devices
Word Devices
Others
System User
Digit Specification
System User
Special
Unit
Index
Constant
Real
Number
Charac-
ter String
Pointer
X
Y
M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modify
K
H
E
"
"
P
3
3
3
3
3 3 3 3
S
2
3 3
3
3
3
3
3
3
3
3 3 3 3
S
2
3 3
3
3
3
3
3
3
3
3 3 3 3
S
2
3 3
3
3
3
S
1
3
Mnemonic
Operation Condition
32-bit Instruction
17 steps DPLSR
Continuous
Operation
9 steps PLSR
Continuous
Operation
16-bit Instruction
Mnemonic
Operation Condition
FNC 59
PLSR
D
S
1
S
2
S
3
D
S
1
S
2
S
3
D
D
S
2
S
1
S
3
Pulse frequency
(Hz)
Total number of
output pulses
(PLS)
Acceleration/
deceleration time
Maximum frequency S
1
S
2
S
3
Acceleration/
deceleration time
S
3
FNC 59
PLSR
Maximum
frequency
(H
Z
)
Total
number
of output
pulses
(PLS)
Acceleration/
deceleration
time
(ms)
Output
number
(Y000,
Y001)
S
1
D
S
2
S
3
Command
input
S
1
S
2
S
3
D