Matrox Mura D-Series, System Builder'S Manual

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Matrox Display Wall – System Builder’s Guide 83
The PCI Express specification also defines backward-compatibility between PCI Express devices. That is, a device designed for Gen-3 PCI
Express functions at Gen-2 speeds when connected to a Gen-2 device, a Gen-2 device functions at Gen-1 speeds when connected to a Gen-1
device, and so on.
For maximizing data transfer capabilities within a system, it is desirable to have the widest lane widths possible throughout the system. An
ideal system for Display Wall applications provides all add-in boards with x16 PCI-Express Gen3 links, maximizing throughput at each
communication link
.
In the diagram above, assume that each PCI Express link is a
×
8 connection operating at Gen-3 speeds. Each link thus has a total available
throughput of 8 GB/s
in each direction
.
Link width *
* The link width provides a measure of the data transfer capabilities of the link in a single direction. Since each PCI Express lane contains both an
upstream and a downstream link, the effective bandwidth is doubled. The numbers in this table represent the maximum bandwidth available in each
direction .
PCIe Gen-1 PCIe Gen-2 PCIe Gen-3 †
† While the serial data rate has only increased from 5 Gb/s to 8 Gb/s over second generation PCI Express, the encoding of the serial data has
changed, providing more efficient transfers and effectively doubling the data transmission rate over Gen-2 PCI Express.
PCIe Gen-4 ‡
‡ Introduction in late 2019-2020.
×1 250 MB/s 500 MB/s 1 GB/s 2 GB/s
×4 1 GB/s 2 GB/s 4 GB/s 8 GB/s
×8 2 GB/s 4 GB/s 8 GB/s 16 GB/s
×16 4 GB/s 8 GB/s 16 GB/s 32 GB/s
Note: Any combination of data streams being transferred through a given switch that results in the total bandwidth exceeding 8
GB/s will result in reduced system performance (stuttering playback and reduced frame rates).