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25 (E)
6.2. X20DC11A6_C1
Table 6-2 Address map of I/O data of X20PS9400 defined in GSDML file
I/O
I/O data name
Data
type
Address
Group name
Name
I
ModuleOK
Unsigned8 x + 0
Inputs_X20DC11A6_C1_a
PowerSupply01
Bool
x + 1.0
PowerSupply02
Bool
x + 1.1
Inputs_X20DC11A6_C1_b
BW_Channel_A
Bool
x + 2.0
BW_Channel_B
Bool
x + 2.1
BW_Channel_R
Bool
x + 2.2
Inputs_X20DC11A6_C1_c
Encoder01_A
Bool
x + 3.0
Encoder01_B
Bool
x + 3.1
Encoder01_R
Bool
x + 3.2
DigitalInput01
Bool
x + 3.4
DigitalInput02
Bool
x + 3.5
I
Encoder01LatchCount
Integer8
x + 4
Encoder01
Integer32 x + 5
Encoder01Latch
Integer32 x + 9
O
Outputs_X20DC11A6_C1_a
BW_QuitChannel_A
Bool
y + 0.0
BW_QuitChannel_B
Bool
y + 0.1
BW_QuitChannel_R
Bool
y + 0.2
Outputs_X20DC11A6_C1_b
Encoder01Reset
Bool
y + 1.0
Encoder01LatchEnable
Bool
y + 1.1
Ex.) Starting address of the input data: 260; Starting address of the output data: 256
- ModuleOK
: 260[8..0]
- PowerSupply01
: 261[0]
- PowerSupply02
: 261[1]
- BW_Channel_A
: 262[0]
- BW_Channel_B
: 262[1]
- BW_Channel_R
: 262[2]
- Encoder01_A
: 263[0]
- Encoder01_B
: 263[1]
- Encoder01_R
: 263[2]
- DigitalInput01
: 263[4]
- DigitalInput02
: 263[5]
- Encoder01LatchCount : 264[8..0]
- Encoder01
: 268[8..0], 267[8..0], 266[8..0], 265[8..0]
- Encoder01Latch
: 272[8..0], 271[8..0], 270[8..0], 269[8..0]
- BW_QuitChannel_A : 256[0]
- BW_QuitChannel_B : 256[1]
- BW_QuitChannel_R : 256[2]
- Encoder01Reset
: 257[0]
- Encoder01LatchEnable : 257[1]