Lexicon RV-8, Service Manual

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RV-8 Service Manual
Configuration data FPGA_SDATA is sourced from the PB13 (112) port of the CPU along with the serial
clock FPGA_CCLK from the PE15 (2) port. Data is clocked into the FPGA on the rising edge of this clock.
When this process is complete, the FPGA asserts the signal FPGA_DONE to a high state, monitored by
the CPU on port
PE7 (105). It should be noted that LED D46 lights when this signal goes high. The CPU
may continue with the remainder of the boot phase upon receipt of the FPGA_DONE signal.
Amplifier Environment Monitor and Control
Signals: FAN_DRV, TEMP[7:1], AC_MON
The CPU incorporates eight 10-bit A/D Converters of which seven are used to monitor the temperature of
the amplifier heatsinks. This is accomplished by monitoring the analog voltages present on the TEMP[7:1]
signal lines connected to the
AN[6:0] ports of the CPU (98:91). These voltages are provided via
thermistors placed in direct contact with the heatsink metal. Each thermistor is part of a voltage divider the
output of which is converted to a 10-bit value by each converter. The output value of the converters are
directly proportional to this voltage, and hence to the temperature of the heatsink. The entire spectrum of
voltages is separated into four heat categories. From these temperature values, the software determines
how fast or slow the heatsink fans are to run. Under extreme heating conditions, the CPU protects the
amplifiers from thermal runaway by placing the entire system into standby mode.
The processor incorporates four Multi-Function Timer Units that may be used to generate timing oriented
waveforms or as interval/event counters. Two are used in this implementation. Timer 1 generates a PWM
signal that is used to control environment fans. The FAN_DRV signal is sourced from the
TIOC1A port
(89) of the CPU. As the heatsink temperature increases beyond each heat category, this PWM signal
shrinks in duty cycle in order to increase the fan speed. This methodology was embraced to keep fan
noise to a minimum while the unit is in operation.
AC_MON is a provision for monitoring the transformer secondary voltage from the amplifier power supply
via the
AN7 A/D Converter port (99). It is currently not used.
Front Panel Boot Level Monitoring and Control
Signals: OVLED, SYSLED, FP_IR_ACK, FPSWITCH[3:1]
The user has the option of starting the RV-8 into three modes:
•
Normal start-up (default)
•
AMON
•
Diagnostics
The processor monitors PE port bits 1 through 3 during the earliest stages of boot, which are connected
to signals FPSWITCH[3:1]. The following button map applies:
•
FPSWITCH1 – Right Mode
•
FPSWITCH2 – Zone 2 DVD2
•
FPSWITCH3 – Zone 3 DVD2
When a high is read on any of these port pins, it indicates that a button is being pressed and held. The
table on the next page illustrates the button combinations and their associated modes. These
combinations must be pressed and held during power up.
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