Lattice Semiconductor MachXO5-NX Development Kit, User Manual

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MachXO5-NX Development Board
Preliminary Evaluation Board User Guide
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8 FPGA-EB-02052-0.90
Config USB
Header (J11)
User USB
Header (J19)
Config FTDI
Device (U1)
User FTDI
Device (U18)
27MHz
Clock (X4)
125MHz
Clock (X5)
12V DC Power
Jack (J17)
Figure 1.2. Bottom View of MachXO5-NX Development Board
1.2. Features

On board MachXO5-25 Device

Optional SGMII, Gbe PHY RJ45 connector (Check Appendix D for the board revision information)

HyperRAM upto 166MHz, x16 bits

Versa Headers bridge with Lattice ASC Demo Board to support L-ASC10

General Purpose Input/Output (GPIO) interface with PMOD, Arduino and Raspberry Pi boards

USB-B connection for device programming with JTAG and Inter-Integrated Circuit (I
2
C) utility

Additional USB-B connection for user with Soft JTAG and UART utility

7-Segment Blue LED, 4-position DIP Switches, 4 push buttons, and 8 red LEDs for demo purposes

ADC interface with 10K POT

Two Hirose FX12-40 headers

Multiple reference clock sources

Optional Aardvark header

Lattice Radiant ® programming support
Note: DNI stands for “Do NOT Install” parts and DI stands for “Do Install” parts for assembly.
Caution: The MachXO5-NX Development Board contains ESD-sensitive components. ESD safe
practices should be followed while handling and using the development board.