MachXO5-NX Development Board
Preliminary Evaluation Board User Guide
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FPGA-EB-02052-0.90
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9.
LEDs and Switches
LEDs and switches of the MachXO5-NX Development Board that can be used in demo and customer designs are
described in this section.
9.1.
Four-Position DIP Switch
Four MachXO5-25 pins are connected to the four switches of SW1, as shown in the circuit design in
. The CTS
side actuated DIP switches are connected to logic level 0 when in the ON position, as shown in
Figure 9.1. Four-Position DIP Switch Circuits
Figure 9.2. Four-position DIP Switch
One side of each switch is connected to GPIOs within the VCCIO5 bank and pulled up through 4.7 kΩ resistors. The
other side is grounded. The designated pins are connected, as shown in
Table 9.1. Four-Position DIP Switch Signals
Net Name
MachXO5-25 Ball
Location
SW1 DIP Switch
Position
4.7 kΩ Pull up Resistor
Logic Level at ON
Position
DIP_SW1
T1
1
R39
0
DIP_SW2
T2
2
R40
0
DIP_SW3
T3
3
R41
0
DIP_SW4
T4
4
R42
0
DIP_SW4
DIP_SW1
DIP_SW2
DIP_SW3
SW1
SW-DIP4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
VCCIO5
R42
4.7K
R40
4.7K
R41
4.7K
R39
4.7K
Summary of Contents for MachXO5-NX Development Kit
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