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Lattice Semiconductor LIFCL-40-EVN, User Manual

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Lattice Semiconductor LIFCL-40-EVN User Manual Download Page 56

CrossLink-NX Evaluation Board 

 

User Guide 
 

 

© 2019-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at 

www.latticesemi.com/legal

.  

All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 

56 

 

FPGA-EB-02028-1.4 

 

References 

Lattice Semiconductor Documents 

Related documents available from your Lattice Semiconductor sales representative are listed on the table below. 

Document 

Title 

FPGA-UG-02042 

Programming Cables

 

FPGA-DS-02049 

CrossLink-NX Family Data Sheet

 

FPGA-TN-02099 

CrossLink-NX sysCONFIG Usage Guide

 

 

Summary of Contents for LIFCL-40-EVN

Page 1: ...CrossLink NX Evaluation Board User Guide FPGA EB 02028 1 4 February 2021...

Page 2: ...all faults and all risk associated with such information is entirely with Buyer Buyer shall not rely on any data and performance specifications or parameters provided herein Products sold by Lattice...

Page 3: ...uration Pins 17 5 CrossLink NX Clock Sources 18 6 Control Buses I2 C UART and SPI 19 6 1 I2 C 19 6 2 UART Topology 19 6 3 SPI Topology 20 SPI Configuration 20 7 LEDs and Switches 21 7 1 DIP Switch 21...

Page 4: ...Raspberry Pi and User I O Interface 35 Figure A 6 SERDES SMAs Switches FMC Control 36 Figure A 7 I2C LEDs and Push Buttons 37 Figure A 8 PMODs 38 Figure A 9 Configuration and ADC 39 Figure A 10 FMC L...

Page 5: ...ocument A list of acronyms used in this document Acronym Definition caBGA Chip Array Ball Grid Array CMOS Complementary Metal Oxide Semiconductor DIP Dual Inline Package DNI Do Not Install ESD Electro...

Page 6: ...hes and a complete set of schematics 1 1 CrossLink NX Evaluation Board The CrossLink NX Evaluation Board features the CrossLink NX FPGA in the 400 ball caBGA package LIFCL 40 9BG400C w the ability to...

Page 7: ...ithout notice FPGA EB 02028 1 4 7 Power Status LEDs D19 D27 Status LEDs User Switches SW1 Raspberry PI Conn JP5 Prototype Area Potentiometer U8 ADC Test Header J26 FMC Parallel Config Header J27 FPGA...

Page 8: ...e as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to c...

Page 9: ...atents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and informatio...

Page 10: ...ents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information...

Page 11: ...device in a 400 ball caBGA package also referred to as LIFCL 40 9BG400C For more information on the capabilities of CrossLink NX see CrossLink NX Family Data Sheet FPGA DS 02049 1 4 Applying Power to...

Page 12: ...EB 02028 1 4 2 Jumpers and Test Connection FTDI Reset JP1 FTDI OSC Reset JP2 Raspberry Pi Conn Power JP3 and JP4 Serdes Test 125 MHz 200 MHz Ref CLK Selection J13 ADC Test Selection J21 J22 and J24 J...

Page 13: ...pberry Pi self power Short 5 0v applies Paspberry Pi connector JP6 JP7 and JP8 VADJ Selection Jumper For FMC LPC Carrier Connector NO Jumper 1 5 V JP6 JP7 and JP8 open Only JP8 Short 1 8 V Only JP7 Sh...

Page 14: ...hows the voltage options available for the various VCCIO supplies V1P8_DPHY VCCIO0 VCCIO5 VCCIO1 V1P8_VCCADC18 VCCIO4 V1P0_VCCSD0 V1P8_VCCPLLSD0 V1P8_LDO V1P0_LDO V1P8 VCCIO3 ADC V1P0_LDO V3P3 V1P8 V3...

Page 15: ...t Programmer tool installed to the mini USB connector on the board J2 A mini USB to USB A cable is included in the CrossLink NX Evaluation Kit The USB hub on the PC detects the cable of the USB functi...

Page 16: ...are subject to change without notice 16 FPGA EB 02028 1 4 4 3 JTAG to MSPI Pass through Interface The download controller can also access the JTAG to MSPI pass through circuit that allows the slave SP...

Page 17: ...specifications and information herein are subject to change without notice FPGA EB 02028 1 4 17 4 5 Other JTAG Configuration Pins The CrossLink NX Evaluation Board provides test points for other JTAG...

Page 18: ...specifications and information herein are subject to change without notice 18 FPGA EB 02028 1 4 5 CrossLink NX Clock Sources The CrossLink NX Evaluation Board has three options for the CrossLink NX c...

Page 19: ...re 4 1 and in more detail in Figure 6 1 Raspberry Pi connector is connected to a dedicated CrossLink NX GPIO bank with a direct local I2 C bus Local I2 C bus can optionally connect to the global I2 C...

Page 20: ...ange without notice 20 FPGA EB 02028 1 4 6 3 SPI Topology SPI Configuration One of the major functions of SPI connections on the board is to support CrossLink NX configuration from the SPI Flash or th...

Page 21: ...d pins are connected as shown in Table Table 7 1 Eight Position DIP Switch Signals Signal Name CrossLink NX Ball CrossLink NX Bank SWITCH0 N14 2 SWITCH1 M14 2 SWITCH2 M16 2 SWITCH3 M15 2 SWITCH4 N15 2...

Page 22: ...Green LED4 L16 1 Green LED5 L15 1 Green LED6 L20 1 Green LED7 L19 1 Green LED8 R17 2 Green LED9 R18 2 Green LED10 U20 2 Green LED11 T20 2 Green LED12 W20 2 Yellow LED13 V20 2 Yellow 7 4 Indicator LEDs...

Page 23: ...C4 GND D4 REFCLKP_FMC C5 GND D5 REFCLKN_FMC C6 RXDP_FMC D6 GND C7 RXDN_FMC D7 GND C8 GND D8 FMC_LA01_CC_P W13 C9 GND D9 FMC_LA01_CC_N V12 C10 FMC_LA06_P W9 D10 GND C11 FMC_LA06_N Y9 D11 FMC_LA05_P R5...

Page 24: ...FMC_LA03_N Y6 H10 FMC_LA04_P V1 G11 GND H11 FMC_LA04_N W1 G12 FMC_LA08_P Y7 H12 GND G13 FMC_LA08_N Y8 H13 FMC_LA07_P W7 G14 GND H14 FMC_LA07_N V7 G15 FMC_LA12_P U1 H15 GND G16 FMC_LA12_N T1 H16 FMC_LA...

Page 25: ...3 FMC_TCK P19 4 PS_POR_B N19 5 GND 6 GND 7 FMC_TDI P20 8 FMC_PRSNT N20 9 FMC_TDO P17 10 FMC_SCL M20 11 GND 12 GND 13 FMC_TMS P18 14 FMC_SDA M19 8 3 Raspberry Pi Board GPIO Header The CrossLink NX Eva...

Page 26: ...R4 Note 3 3 V and 5 V provide the power to the Raspberry Pi board when JP3 and JP4 are installed When JP3 and JP4 are not installed Raspberry Pi needs its own 3 3 V and 5 V power When connecting direc...

Page 27: ...rein are subject to change without notice FPGA EB 02028 1 4 27 CN1 Pin Name Signal Name LIFCL 40 Ball 21 NO Connect 22 CAM_SDA W5 23 CAM_SCL Y5 24 CAM_RESET W18 25 V1P2 26 V1P8 27 GND 28 GND 29 V2P8 3...

Page 28: ...6 J17 J18 and J19 Header Pin Connections Pin Name Signal Name LIFCL 40 Ball J17 Pin Name 1 PMOD0_1 D10 2 PMOD0_2 D9 3 PMOD0_3 D7 4 PMOD0_4 D8 5 PMOD0_7 D6 6 PMOD0_8 D5 7 PMOD0_9 D4 8 PMOD0_10 D3 J18 P...

Page 29: ...rallel Configuration Header The J27 header is used to access the SPI port of the CrossLink NX Table 8 8 J27 Header Pin Connections J27Pin Name Signal Name LIFCL 40 Ball 1 VCCIO2 2 VCCIO2 3 FMC_TCK P19...

Page 30: ...Programmer 2 2 or later support LIFCL 40 9BG400CES2 ES2 silicon Lattice Radiant Software 2 0 and Radiant Programmer 2 0 support only LIFCL 40 9BG400CES ES silicon 10 Storage and Handling Static elect...

Page 31: ...Configuration and ADC Bank0 10 FMC LPC Bank3 4 5 11 Power CSI and Banks 12 Power Decoupling 13 Power Regulators 14 Power Block Diagram Notes Resistors size 0402 tolerance 5 unless otherwise specified...

Page 32: ...iagram CrossLink NX Evaluation Board B Date Size Schematic Rev of Sheet Title Lattice Semiconductor Applications http www latticesemi com Support Board Rev Project Friday Nov 22 2019 B B 1 14 2 Block...

Page 33: ...K C15 0 1uF C10 4 7uF J1 Header 1x8 DNI 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 C9 0 1uF R2 4 7K R18 4 7K C6 4 7uF C4 0 1uF R9 2 2K R17 0 DNI R19 4 7K R172 10K C1 0 1uF FTDI High Speed USB FT2232H FT2232HL U1...

Page 34: ...7 VCCDPHY1 C5 VCCPLLDPHY1 C9 DPHY1_DP3 A10 DPHY1_DN3 B10 DPHY1_DP1 A9 DPHY1_DN1 B9 DPHY1_CKP A8 DPHY1_CKN B8 DPHY1_DP0 A7 DPHY1_DN0 B7 DPHY1_DP2 A6 DPHY1_DN2 B6 J4 Header_2x1 1 1 2 2 ASE3 27 000MHz K...

Page 35: ...ion Board B AE9 AF3 AD2 AB4 C37 0 1uF C41 0 1uF AF1 R36 0 DNI AF10 AE4 AD5 AB5 AG10 AA7 AG5 AD7 AB7 C39 10uF AA9 AG6 AD9 AC6 LIFCL 40 BG400 U3G VCCIO6 L3 VCCIO6 P3 PL24A K5 PL24B K6 PL26A K7 PL26B K8...

Page 36: ...10K R41 100 ohm DNI C58 10uF C57 0 1uF U5 AK5DAF1 200 0000T2 OE 1 NC 2 GND 3 OP 4 ON 5 VCC 6 TP_V1P0_VCCSD 1 R49 0 R65 0 DNI RN1C EXB2HV472JV 4_7K 3 14 RN1H EXB2HV472JV 4_7K 8 9 R53 0 1 0603 1 R45 1...

Page 37: ...valuation Board B Date Size Schematic Rev of Sheet Title Lattice Semiconductor Applications http www latticesemi com Support Board Rev Project Friday Nov 22 2019 B B 1 14 7 I2C LEDs And Push Buttons C...

Page 38: ...of Sheet Title Lattice Semiconductor Applications http www latticesemi com Support Board Rev Project Friday Nov 22 2019 B B 1 14 8 PMODs CrossLink NX Evaluation Board B C67 0 1uF J17 PMOD 2x6 8 2 4 6...

Page 39: ...on and ADC CrossLink NX Evaluation Board B Date Size Schematic Rev of Sheet Title Lattice Semiconductor Applications http www latticesemi com Support Board Rev Project Monday Jul 20 2020 B B 1 14 9 Co...

Page 40: ...D H6 LA02_P H7 LA02_N H8 GND H9 LA04_P H10 LA04_N H11 GND H12 LA07_P H13 LA07_N H14 GND H15 LA11_P H16 LA11_N H17 GND H18 LA15_P H19 LA15_N H20 GND H21 LA19_P H22 LA19_N H23 GND H24 LA21_P H25 LA21_N...

Page 41: ...ttp www latticesemi com Support Board Rev Project Friday Nov 22 2019 B B 1 14 11 Power CSI and Banks CrossLink NX Evaluation Board B Date Size Schematic Rev of Sheet Title Lattice Semiconductor Applic...

Page 42: ...wer Decoupling CrossLink NX Evaluation Board B C124 0 1uF C115 0 1uF C123 10uF 16V 0603SMT C119 0 1uF C129 0 1uF C126 0 1uF FB6 MPZ1005S121CT000 C127 0 1uF FB5 MPZ1005S121CT000 C117 0 1uF J38 Header_2...

Page 43: ...C163 330pF 0402SMT C143 220NF 0402SMT 16V R145 0 DNI C148 10pF 0402SMT J41 Header_2x1 1 1 2 2 R155 1 07K 0603SMT 1 C153 22uF 6 3V 0805SMT R170 909 0603SMT 1 C157 220NF 0402SMT 16V R142 10k 1k R144 L1...

Page 44: ...0 V S W U 15 S W U 16 V1P0_LDO V1P2 1 0 V VCC_CORE_1P0 1 0 V LDO U14 LDO U11 Camera CN1 V1P8 1 8 V V2P8 1 2 V 2 8 V LDO U12 V1P8_LDO 1 8 V LDO U13 FTDI U1 Raspberry JP5 V5P0 5 0 V V3P3 3 3 V LIFCL 40...

Page 45: ...AB5 AA5 AG6 AF6 AE6 AD6 AC6 AB6 AA6 AG7 AF7 AE7 AD7 AC7 AB7 AA7 AG8 AF8 AE8 AD8 AC8 AB8 AA8 AG9 AF9 AE9 AD9 AC9 AB9 AA9 AG10 AF10 AE10 AD10 AC10 AB10 AA10 AG11 AF11 AE11 AD11 AC11 AB11 AA11 77 T POIN...

Page 46: ...5 10nF RLP 130 A GRM155R61C103KA01D Murata CAP CER 10000PF 16V X5R 0402 11 C79 C80 C81 3 20pF RLP 132 DNL 12 C87 C89 2 1600pF C0805 C0805C162J5GAC7800 Kemet CAP CER 1600PF 50V NP0 0805 13 C88 C90 2 16...

Page 47: ...2A TO277A 29 D29 D30 D33 D34 4 1N4448W 1N4448W 1N4448WS On Semi DIODE GEN PURP 75V 150MA SOD323F 30 D31 D32 D35 D36 4 DFLS220L DFLS220L DFLS220L 7 Diodes Incorporated DIODE SCHOTTKY 20V 2A POWERDI123...

Page 48: ...220 OHM 0402 1LN 46 L13 1 2 2uH SPM6530T 2R2M SPM6530T 2R2M SPM6530T 2R2M TDK Corporation FIXED IND 2 2UH 8 2A 19 MOHM SMD 47 L14 L15 L16 L17 4 4 7uH SPD62R 472M SPD62R SPD62R 472M API Delevan Inc FIX...

Page 49: ...R162 R163 21 0 1 603 ERJ 3RSFR10V Panasonic RES 0 1 OHM 1 1 10W 0603 64 R45 1 1 15K 0402SMT R0402 RC0402FR 071K15L Yageo RES SMD 1 15K OHM 1 1 16W 0402 65 R46 R49 R54 R55 R56 R 58 R60 R63 R73 R74 R8...

Page 50: ...1 10W 0402 81 R143 R165 2 1 15K 0603SMT RLP 101 RC0603FR 071K15L Yageo RES SMD 1 15K OHM 1 1 10W 0603 82 R148 R170 2 909 0603SMT RLP 101 RC0603FR 07909RL Yageo RES SMD 909 OHM 1 1 10W 0603 83 R151 R15...

Page 51: ...017835 Wurth SWITCH TACTILE SPST NO 0 05A 12V 97 TP_VCCIO1 TP_VCCIO2 TP_VCCIO3 TP_VCCIO4 TP_VCCIO5 TP_VCCIO6 TP_VCCIO7 TP_VCC_CORE_V1P0 TP_V1P0_VCCSD TP_V1P0_LDO TP_V1P2 TP_V1P8_VCCPLLSD TP_V1P8_VCCAU...

Page 52: ...onductor IC REG BUCK ADJ 3A 8HTSOP J 110 U11 1 NCP110AMX120TBG 4XDFN_NCP1 10 NCP110AMX120TBG ON Semiconductor IC REG LINEAR 1 2V 200MA 4XDFN 111 U12 1 NCP110AMX280TBG 4XDFN_NCP1 10 NCP110AMX280TBG ON...

Page 53: ...Configuration Issues Early versions of the Evaluation Board were assembled with LIFCL 40 9BG400CES ES suffix Engineering Sample devices With ES silicon an Early I O Release enabled bitstream is not co...

Page 54: ...ss circuit is connected incorrectly J24 is connected to the negative input and J25 is connected to the positive input see Figure A 9 To effectively utilize the ADC test access circuit on the Crosslink...

Page 55: ...trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA EB 02028 1 4 55 Appendix E CrossLink NX ES2 Device Update The CrossLink NX Ev...

Page 56: ...gistered trademarks of their respective holders The specifications and information herein are subject to change without notice 56 FPGA EB 02028 1 4 References Lattice Semiconductor Documents Related d...

Page 57: ...are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject t...

Page 58: ...Header Pin Connections Changed G32 pin to V16 Changed G34 pin to W17 Corrected table numbering in chapters 7 and 8 Revision 1 2 August 2020 Section Change Summary Introduction Added Figure 1 3 Silkscr...

Page 59: ...www latticesemi com...

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