Kontron ePCI-101, User Manual, Page: 96 / 109

F-1
ePCI-101 User’s Guide
F. BIOS Setup Error Codes
F.1 POST Beep
F.1.1 Recoverable POST Errors
Whenever a recoverable error occurs during POST, Phoenix BIOS displays an error message
describing the problem.
Phoenix
BIOS also issues a beep code (one long tone followed by two short tones) during POST if the
video configuration fails (no card installed or faulty) or if an external ROM module does not
properly checksum to zero.
An external ROM module (such as the VGA) also can issue audible errors, usually consisting of one
long tone followed by a series of short tones.
F.1.2 Terminal POST Errors
There are several POST routines that issue a
POST Terminal Error
and shut down the system if they
fail. Before shutting down the system, the terminal error handler issues a beep code signifying the
test point error, writes the error to port 80h, attempts to initialize the video, and writes the error in
the upper left corner of the screen (using both mono and color adapters).
The routine derives the beep code from the test point error as follows:
1.
The 8-bit error code is broken down to four, 2-bit groups.
Discard the most significant group if it is 00.
2. Each group is made one- based (1 through 4) by adding 1.
3. Short beeps are generated for the number in each group.
Example:
Test point 01Ah = 00 01 10 10 = 1- 2- 3- 3 beeps
F.1.3 Test Points and Beep Codes
At the beginning of each POST routine, the BIOS outputs the test point error code to I/O address
80h. Use this code during trouble shooting to establish at what point the system failed and what
routine was being performed.
If the BIOS detects a terminal error condition, it halts POST after issuing a terminal error beep code
(See above) and attempting to display the error code on upper left corner of the screen and on the
port 80h LED display.
If the system hangs before the BIOS can process the error, the value displayed at the port 80h is the
last test performed. In this case, the screen does not display the error code.
Code Beeps POST Routine Description
02h Verify Real Mode
03h Disable Non-Maskable Interrupt (NMI)
04h Get CPU type
06h Initialize system hardware
07h De-shadow BIOS code
08h Initialize chipset with initial POST values
09h Set IN-POST flag, Verify CMOS and RTC validity
0Ah Initialize CPU registers