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C-2
ePCI-101 User’s Guide
C.3
LANS and Serial Buffers Control
Address
Action
D7
D6
D5
D4
D3
D2
D1
D0
Read EnLan1 EnLan0
NU
RS485 RS232 ST1 VT100# DisVGA#
Write EnLan1
EnLan0
NU
RS485 RS232 ST1
NU
NU
0x190
Reset 1
1
X
0 1 0
X
X
EnLan1
Enable LAN1. This bit can only be modified when bit LOCK is 0. For BIOS use.
EnLan0
Enable LAN0. This bit can only be modified when bit LOCK is 0. For BIOS use.
RS485
Serial port buffer control, see table below
RS232
Serial port buffer control, see table below
ST1
Serial port buffer control, see table below
VT100#
When '0', VT100 mode is enabled
DisVGA#
When '0', VGA is disabled
RS485
RS232
ST1
Description
0
1
X
RS232 mode (default)
1
0
0
RS485/422 point-to-point mode.
- RX is always enable:
- TX enabled when COM2 RTS is asserted.
1
0
1
RS485 party line mode:
- RX enabled when COM2 RTS is deasserted,
- TX enabled when COM2 RTS is asserted.
1
1
X
Illegal. This puts the buffers in RS232 mode.
0
0
X
Illegal. This puts the buffers in RS232 mode.
This is the condition on power up. Value is changed by the BIOS.
C.4
Reset history and CpuFault
Address
Action
D7
D6
D5
D4
D3
D2
D1
D0
Read PBRST
NU
WDO CpuFlt
NU
NU
NU
NU
Write
NU
NU
NU
CpuFlt
NU
NU
NU
NU
0x191
Reset PBRST
X
WDO
1
X
X
X
X
PBRST
A pushbutton reset was trapped by the reset history circuit.
WDO
A watchdog reset was trapped by the reset history circuit.
CpuFlt
CPU Fault: a "1" indicate a fault by pulling pin CPUFAULT# to GND on the hardware monitor
connector. Set on reset by the hardware and cleared by the BIOS.
C.5
History Clear
Address
Action
D7
D6
D5
D4
D3
D2
D1
D0
Read
NU
NU
NU
NU
NU
Lock MezzP ClrHis#
Write
NU
NU
NU
NU
NU
Lock MezzP
ClrHis#
0x192
Reset
X
X
X
X
X
1 1
1
Lock
When bit lock is set (default), LANs enabled in register 0x190 are read-only.
This is for BIOS usage only. Leave this bit to '1'.
MezzP
For BIOS use only. When a firmware hub mezzanine is present, clearing this bit will give the
onboard firmware hub address 0 (otherwise its 1 when the mezzanine is present).
ClrHis#
Clear and bring back to 1 to clear the reset history.
Summary of Contents for ePCI-101
Page 24: ...2 1 ePCI 101 User s Guide 2 1 Block Diagram...
Page 83: ...D 1 ePCI 101 User s Guide D Board Diagrams D 1 Top Devices Surface Mount...
Page 84: ...D 2 ePCI 101 User s Guide D 2 Bottom Devices Surface Mount...
Page 85: ...D 3 ePCI 101 User s Guide D 3 Mounting Holes...
Page 86: ...D 4 ePCI 101 User s Guide D 4 Top Mounting Components...