Kontron AM4100, User Manual

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AM4100 Functional Description
ID 36126, Rev. 2.0 Page 2 - 15
P R E L I M I N A R Y
2.4.2 Synchronization Clock Interface
On the AM4100, two PCI Express reference clock configurations are supported in accordance
with the PCI Express Base Specification Revision 1.0a. One configuration uses two separate
100 MHz reference clocks, one on the AM4100 and one on the carrier. The other configuration
uses one common clock source for both the AM4100 and the carrier. If the common clock
source is used, the AM4100 uses the AMC clock interface FCLKA (see Figure 2-4, “AM4100
Port Mapping”). In this event, the carrier must provide the common reference clock (100 MHz)
on the FCLKA pins.
2.4.3 System Management Interface
The system management interface is a port from the module to the carrier via the Local Intelli-
gent Platform Management Bus (IPMB-L). The Module Management Controller uses this port
for the communication with the Carrier Intelligent Platform Management Controller (IPMC). The
IPMB-L is a multi-master I²C bus.
2.4.4 JTAG Interface
JTAG support is provided on the AMC Card-edge connector. The JTAG interface is supported
for vendor product test and logic update. On the AM4100, the FPGA JTAG port is connected
to the AMC JTAG port.
2.4.5 Module Power Interface
The module power interface provides the management power (MP) and payload power (PWR).
These two supply voltages must have power-good indicators so that the system management
can detect boot sequence events and nominal operating conditions.
The AM4100 operates with payload power in the range of 10.8 V to 13.2 V, and with manage-
ment power of 3.3 V ± 5%.
The board supports removal and insertion in a powered slot as required by AMC.0.