Keithley KPCI-PIO24, User Manual, Page: 61 / 66

B-4 Glossary KPCI-PIO24 User’s Manual
Port
See input/output port.
Port group
For digital I/O emulating the I/O of an 8255 programmable peripheral interface chip, a group of
three 8 bit ports, commonly labeled PA, PB and PC. Digital I/O that emulates multiple 8255 chips
is typically divided into multiple port groups.
Port I/O call
A software program statement that assigns bit values to an I/O port or retrieves bit values from
an I/O port. Examples include a C/C++ statement containing an
inp or outp function or a Basic
statement containing a peek or poke function.
Register
1
A set of bits of high speed memory within a microprocessor or other electronic device, used to
hold data for a particular purpose.
Shielding
A metal enclosure for the circuit being measured or a metal sleeve surrounding wire conductors
(coax or triax cable) to lessen interference, interaction, or current leakage. The shield is
usually grounded.
Target mode
A PCI bus mode in which data from a data acquisition card is transferred indirectly to the
computer memory in the foreground, via the host computer CPU, instead of directly, via Bus
mastering. Sometimes referred to as pass-through operation. See also bus mastering and
foreground task.
Trap
1
(verb)
To intercept an action or event before it occurs, usually in order to do something else.
TTL
Abbreviation for transistor-transistor-logic. A popular logic circuit family that uses multiple-
emitter transistors. A low signal state is defined as a signal 0.8 V and below. A high signal state
is defined as a 2.0 V and above.
1
Microsoft Press

Computer Dictionary, Third Edition. Refer to “Sources” below.
Sources:
Keithley Instruments, Inc., Catalog and Reference Guide (full line catalog),
glossary, 1998
Microsoft Press

Computer Dictionary, Third Edition (ISBN: 1-57231-446-X) by Microsoft
Press. Reproduced by permission of Microsoft Press. All rights reserved.