Keithley KPCI-PIO24 User Manual Download Page 12 | Manualshive

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Keithley KPCI-PIO24 User Manual Download Page 12

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Overview

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Summary of Contents for KPCI-PIO24

Page 1: ...Keithley KPCI PIO24 Manual Get Pricing Availability at ApexWaves com Call Today 1 800 915 6216 Email sales apexwaves com https www apexwaves com modular systems keithley digital io boards KPCI PIO24...

Page 2: ...KPCI PIO24Parallel Digital I O Board User s Manual A G R E A T E R M E A S U R E O F C O N F I D E N C E...

Page 3: ...program change to bypass such nonconformity in the Keithley Software Failure to notify Keithley of a nonconformity during the warranty shall relieve Keithley of its obligations and liabilities under...

Page 4: ...KPCI PIO24 Parallel Digital I O Board User s Manual 1998 Keithley Instruments Inc All rights reserved Cleveland Ohio U S A Third Printing September 2002 Document Number 98230 Rev C...

Page 5: ...re num bered sequentially When a new Revision is created all Addenda associated with the previous Revision of the manual are incorporated into the new Revision of the manual Each new Revision includes...

Page 6: ...s that a shock hazard exists when voltage levels greater than 30V RMS 42 4V peak or 60VDC are present A good safety practice is to expect that hazardous voltage is present in any unknown circuit befor...

Page 7: ...components in mains circuits including the power transformer test leads and input jacks must be purchased from Keithley Instru ments Standard fuses with applicable national safety approvals may be use...

Page 8: ...X 3 3 Installing TestPoint with your hardware 3 3 Unwrapping and inspecting the KPCI PIO24 board 3 4 Installing and connecting the KCPI PIO24 board 3 4 Installing the board 3 5 Identifying the I O con...

Page 9: ...ssignments 4 3 Setting control and data registers 4 6 5 Troubleshooting Identifying symptoms and possible causes 5 2 Systematic problem isolation 5 3 General problem isolation procedure 5 3 I O bit te...

Page 10: ...roblem isolation flowchart 5 4 Figure 5 2 Mating connector wiring for loop back test 5 11 Figure 5 3 IO Control Panel example 5 12 Figure 5 4 Setting port input and output Configure switches 5 13 Figu...

Page 11: ...tured cables and accessories 3 9 4 I O Address Mapping Table 4 1 Data and control register addresses 4 3 Table 4 2 Control register bit assignments for each port group 4 4 Table 4 3 Data transfer mode...

Page 12: ...1 Overview...

Page 13: ...l is organized as follows Section 2 briefly describes features and characteristics of the KPCI PIO24 Section 3 describes how to unpack install and connect the board and outlines software options and i...

Page 14: ...2 General Description...

Page 15: ...ily accessible interrupt configuration The KPCI PIO24 meets a wide variety of parallel I O requirements including communicating with peripherals operating relays and reading switch inputs All I O line...

Page 16: ...ink allow it to control many LEDs Opto 22 modules and relays directly The PA PB and PC ports can always be read write accessed regardless of the direction they were initially configured for without th...

Page 17: ...ll sixteen 32 bit operation registers 64 bytes total All eight 32 bit specific functional registers All memory addresses of registers are automatically assigned by the PCI bus Plug and Play feature up...

Page 18: ...3 Installation...

Page 19: ...2K XP DriverLINX driver software for Windows 9X NT 2K XP DriverLINX software supplied by Keithley with the KPCI PIO24 board provides convenient interfaces to configure and set I O bits without regist...

Page 20: ...d together and pass data to each other The function blocks which are selected from palette menus range from arithmetic functions to advanced acquisition control and analysis routines Also included are...

Page 21: ...ctricity from wrapped board as soon as you hold it Keep the wrist strap on until you have finished installing the board If you do not have a grounded wrist strap discharge static electricity by holdin...

Page 22: ...ave a grounded wrist strap periodically discharge static electricity by placing one hand firmly on a grounded metal portion of the computer chassis Use the following steps to install a KCPI PIO24 boar...

Page 23: ...pin 11 13 15 17 19 or 21 3 to 10 PB0 to PB7 The eight I O bits of port B PB0 is the least significant bit LSB of port B and PB7 is the most significant bit MSB 11 13 15 17 19 21 DIG COM Digital commo...

Page 24: ...PCI PIO24 I O connectors can be mated directly to your external circuits using a locally fabricated cable assembly Alternatively the connectors can be mated to your circuits via a manufactured cable a...

Page 25: ...d wrist strap periodically discharge static electricity by placing one hand firmly on a grounded metal portion of the computer chassis Using locally fabricated cable assemblies To mate a locally fabri...

Page 26: ...ts pull up de bounce and relay drive circuits and discusses using 5 VDC power from the board for these and other applications Monitoring contact closure at an input To ensure that the KPCI PIO24 relia...

Page 27: ...ten desirable to eliminate contact bounce from the signal using a de bounce circuit between the contacts and the KPCI PIO24 input Figure 3 5 shows a typical de bounce circuit that can be used with For...

Page 28: ...titute a Darlington NPN transistor Using 5 VDC from the computer power supply CAUTION Do not connect the 5 VDC outputs to an external 5VDC supply This may damage the external supply the board and the...

Page 29: ...4 Interrupts and I O Address Mapping...

Page 30: ...assigned by the user to memory reserved for I O The DriverLINX driver shipped with your board provides a user friendly Application Programming Interface API that supports Visual C Visual Basic and Del...

Page 31: ...oard such as the KPCI PIO24 as for an ISA board The base address for your KPCI PIO24 is a memory mapped address BADDR1 that is assigned by Plug and Play It is not a fixed user assigned I O address suc...

Page 32: ...e footnote5 Bit 3 I O direction for PC port upper half PCHI0_DIR Input Output Bit 2 I O direction for PC port lower half PCLO0_DIR Input Output Bit 1 I O direction for PB port PB0_DIR Input Output Bit...

Page 33: ...transfer Therefore an interrupt cannot be generated at an arbitrary time An interrupt is generated only after a predefined number of data points have been transferred Bit combinations Data transfer mo...

Page 34: ...control and data registers can be manipulated in the following special situations You are an advanced user needing to use the KPCI PIO24 with an operating system other than Microsoft Windows 95 98 or...

Page 35: ...5 Troubleshooting...

Page 36: ...board software are installed mouse control is lost or system freezes An interrupt conflict occured Unplug the board to regain mouse control Look closely at the COM ports and at the interrupts of other...

Page 37: ...he board at the mounting bracket using a grounded wrist strap Do not touch the circuit traces or connector contacts If you do not have a grounded wrist strap periodically discharge static electricity...

Page 38: ...5 4 Troubleshooting KPCI PIO24 User s Manual Figure 5 1 Problem isolation flowchart...

Page 39: ...tions satisfactorily by itself Proceed as follows a Remove the KPCI PIO24 board from the host computer NOTE If more than one KPCI PIO24 board is installed in your computer remove all KPCI PIO24 boards...

Page 40: ...probability of good contact c Make sure that the board is firmly seated in the PCI slot connector d Turn ON power to the host computer 10 Check if the computer now finds the OK board to be a PCI resou...

Page 41: ...alls smoothly and completely b Continue with step 17 17 Perform I O bit tests to determine whether you can write and read all I O bits to and from the OK board the I O loop back test and the output se...

Page 42: ...24 board s originally installed in the computer is likely the cause of the problem Continue with step 24 24 Replace the faulty board Do one of the following If only one KPCI PIO24 board was installed...

Page 43: ...ew one contact Keithley as described in Technical support Then continue with step 27 However if you have reached this point after trying all boards and the I O on each board has been found satisfactor...

Page 44: ...N can damage your computer the board or both I Oloop backtest The I O loop back test checks input and output bit performance You prepare a specially wired loop back connector that connects the bits of...

Page 45: ...ce value must be at least 700 ohms 2 Turn OFF the host computer 3 Insert the loop back test connector prepared in step 1 into the board connector 4 Turn ON the host computer and boot Windows 95 98 or...

Page 46: ...IO Control Panel should appear See the example in Figure 5 3 Figure 5 3 IO Control Panel example NOTE In following steps 7 through 9 graphical slide switches on the PIO Control Panel are used for all...

Page 47: ...by clicking the DIP switches In read mode however DIP switches only monitor the bit settings currently in the I O register you cannot change bit settings A port configured for input such as port B or...

Page 48: ...do not agree the board is not functioning properly Stop here and return to the step in the General problem isolation procedure where you were directed to do I O bit tests step 17 or step 26e in the G...

Page 49: ...tput bit patterns set by software using a DriverLINX graphical interface NOTE This test is performed without user circuits being connected to the outputs Perform the output set test as follows 1 Ready...

Page 50: ...Find the DriverLINX Test Panels folder under which you should find the PIO Panel entry c Click on the PIO Panel entry The PIO Control Panel should appear See the example in Figure 5 9 Figure 5 9 PIO...

Page 51: ...e mode In write mode you may toggle bit settings high or low by clicking the DIP switches In read mode however DIP switches only monitor the bit settings currently in the I O register you cannot chang...

Page 52: ...O Control Panel should output a logic low signal at the corresponding I O terminal corresponding roughly to 0 volts at a DMM DVM If the bit patterns set on the PIO Control Panel do not agree with the...

Page 53: ...If the bit patterns set on the PIO Control Panel do not agree with the logic levels measured at the I O terminals the board is not functioning properly Stop here and return to the step in the General...

Page 54: ...nels ____________________ ____________________ ____________________ ____________________ ____________________ ____________________ Computer Manufacturer CPU type Clock speed MHz KB of RAM Video system...

Page 55: ...age the equipment using the original anti static wrapping if possible and handle it with ground protection Ship the equipment to ATTN RMA _______ Repair Department Keithley Instruments Inc 28775 Auror...

Page 56: ...A Specifications...

Page 57: ...rent at Vout Low 1 A VOH Voltage Output High at IOH 8mA 2 4 3 3 V VOH Voltage Output High at IOH 15mA 2 0 3 0 V VOL Voltage Output Low at IOL 64mA 0 3 0 55 V IOL Current Output Low 64 mA IOH Current O...

Page 58: ...B Glossary...

Page 59: ...ction or radiation Crosstalk is expressed in decibels at a specified load and up to a specific frequency Darlington A high gain current amplifier composed of two bipolar transistors typically integrat...

Page 60: ...igger A software generated event that starts an operation See also external trigger Interrupt A signal to the CPU indicating that the board detected the occurrence of a specified condition or event In...

Page 61: ...lessen interference interaction or current leakage The shield is usually grounded Target mode A PCI bus mode in which data from a data acquisition card is transferred indirectly to the computer memory...

Page 62: ...for 5 3 5 4 Bus control 2 3 definition B 2 memory assignments 4 2 Bus controller AMCC S5933 2 4 4 2 4 6 Bus mastering 2 4 4 2 definition B 2 Byte definition B 2 C Cable for loop back connections 5 11...

Page 63: ...ternal trigger definition B 3 F FIFO definition B 3 Flowchart problem isolation 5 4 Flowchart troubleshooting 5 4 Foreground task definition B 3 G GPIB definition B 3 Grounding signal I O pin assignme...

Page 64: ...l See PIO control panel using in bit tests PC division 2 2 read write access 2 3 width 2 2 Power 5 VDC for external circuits 3 10 board requirements A 2 Power board circuits for external 3 10 Power up...

Page 65: ...ymptoms and possible causes 5 2 System requirements 2 2 Systematic problem isolation 5 3 T Target mode 2 4 4 2 definition B 4 Technical support 5 20 Temperature range board A 2 Test loop back 5 10 out...

Page 66: ...x 01 60 11 77 26 GERMANY Landsberger Strasse 65 82110 Germering 089 84 93 07 40 Fax 089 84 93 07 34 GREAT BRITAIN Unit 2 Commerce Park Brunel Road Theale Berkshire RG7 4AB 0118 929 7500 Fax 0118 929 7...

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