
KPCI-PIO24 User’s Manual
Glossary
B-3
External trigger
An analog or digital hardware event from an external source that starts an operation. See also
internal trigger.
Foreground task
An operation, such as a task that occurs in the single or synchronous mode, that cannot take place
while another program or routine is
running.
FIFO
First-in/first-out memory buffer. The first data into the buffer is the first data out of the buffer.
GPIB
Abbreviation for General Purpose Interface Bus. It is a standard for parallel interfaces.
IEEE-488
See GPIB.
Input/Output (I/O)
The process of transferring data to and from a computer-controlled system using its
communication channels, operator interface devices, data acquisition devices, or
control interfaces.
Input/output port
1
A channel through which data is transferred between an input or output device and the processor.
Internal tigger
A software-generated event that starts an operation. See also external trigger.
Interrupt
A signal to the CPU indicating that the board detected the occurrence of a specified condition
or event.
Interrupt level
A specific priority that ensures that high priority interrupts get serviced before low
priority interrupts.
Interrupt-mode operation
Mode in which a data acquisition board acquires or generates samples using an Interrupt Service
Routine (ISR).
Interrupt service routine (ISR)
A software program that handles interrupts.
ISA Bus
Industry Standard Architecture. The 16-bit wide bus architecture used in most MS-DOS and
Windows computers. Sometimes called the AT bus.
Map
1
Any representation of the structure of an object. For example, a memory map describes the layout
of objects in an area of memory, and a symbol map lists the association between symbol names
and memory addresses in a program.
OCX
Abbreviation for OLE Custom Control.
Pass-through operation
See target mode.
PCI
Abbreviation for Peripheral Component Interconnect. It is a standard for a local bus.
Summary of Contents for KPCI-PIO24
Page 12: ...1 Overview...
Page 14: ...2 General Description...
Page 18: ...3 Installation...
Page 29: ...4 Interrupts and I O Address Mapping...
Page 35: ...5 Troubleshooting...
Page 38: ...5 4 Troubleshooting KPCI PIO24 User s Manual Figure 5 1 Problem isolation flowchart...
Page 56: ...A Specifications...
Page 58: ...B Glossary...