Keithley KPCI-PIO24, User Manual, Page: 53 / 66

KPCI-PIO24 User’s Manual Troubleshooting 5-19
Figure 5-13
Port output settings, bit pattern 2
13. Click the ‘Update All’ button on the PIO Control Panel.
14. Again, measure the voltage between signal ground and each bit of ports A, B, and C with a
DMM or DVM or check the logic level for each bit of ports A, B, and C bit with a TTL logic
probe. Connect these instruments to the terminal accessory or ribbon cable that is connected
to the selected KPCI-PIO I/O connector.
Again, each bit set to ON in the PIO Control Panel should output a logic-high signal at the
corresponding I/O terminal, corresponding roughly to 4 volts at a DMM/DVM. Each bit set
to OFF in the PIO Control Panel should output a logic-low signal at the corresponding I/O
terminal, corresponding roughly to 0 volts at a DMM/DVM.
• If the bit patterns set on the PIO Control Panel do not agree with the logic levels measured
at the I/O terminals, the board is not functioning properly. Stop here, and return to the step
in the “General problem isolation procedure” where you were directed to do I/O bit tests
(step 17 or step 26e in the “General problem isolation procedure”).
• If the bit patterns set on the PIO Control Panel do agree with the logic levels measured at
the I/O terminals, and you have performed an output set test for all four port groups, the
board is functioning properly. Stop here, and return to the step in the “General problem
isolation procedure” where you were directed to do I/O bit tests (step 17 or step 26e in the
“General problem isolation procedure”). Or, optionally, perform the I/O loop-back test, as
discussed in the previous section, if you have not already done so.
PORT A
7 6 5 4 3 2 1 0
n n n n
On
n n n n
&HAA
PORT B
7 6 5 4 3 2 1 0
n n n n
On
n n n n
&HAA
PORT C
7 6 5 4 3 2 1 0
n n n n
On
n n n n
&HAA