Juniper T4000 -, Hardware Manual

Page: 33 / 396

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Storage and change management—Configuration files, system images, and microcode
can be held and maintained in primary and secondary storage systems, permitting
local or remote upgrades.
•
Monitoring efficiency and flexibility—The router supports functions such as alarm
handling and packet counting on every port, without degrading packet-forwarding
performance.
Related
Documentation
System Architecture Description for T Series Routers on page 7
•
•
Packet Forwarding Engine Architecture for T Series Routers on page 9
Packet Forwarding Engine Architecture for T Series Routers
The Packet Forwarding Engines provide the Layer 2 and Layer 3 packet switching,
forwarding, and route lookup functions. The Packet Forwarding Engines are implemented
in ASICs that are physically located on the FPCs and the PICs. To ensure the efficient
movement of data, the router is designed so that ASICs on the hardware components
handle the forwarding of data.
• Packet Forwarding Engine Components on page 9
•
Data Flow on page 9
Packet Forwarding Engine Components
Each Packet Forwarding Engine consists of the following components:
•
Layer 2/Layer 3 Packet Processing ASIC, which performs Layer 2 and Layer 3
encapsulation and decapsulation, and manages the division and reassembly of packets
within the router.
• Queuing and Memory Interface ASICs, which manage the buffering of data cells in
memory and the queueing of notifications.
•
T Series Internet Processor, which provides the route lookup function.
• Switch Interface ASICs, which extract the route lookup key and manage the flow of
data cells across the switch fabric.
Media-specific ASICs on the PICs perform control functions tailored to the PIC media
types.
Data Flow
To ensure the efficient movement of data, the router is designed so that ASICs on the
hardware components handle the forwarding of data. Data flows through the router in
the following sequence (see
Figure 5 on page 10 ):
9 Copyright © 2013, Juniper Networks, Inc.
Chapter 2: T4000 Router System Architecture Overview