REL1.1
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iWave Systems Technologies Pvt. Ltd.
RZ/G1E SODIMM Development Platform Hardware User Guide
2.8
Expansion Header
RZ/G1E SODIMM carrier board supports 20pin Expansion Header (J12) for accessing additional IO interfaces from
CPU. CAN1, HSCIF2, SCIF1, SCIF5 and PWM (TPUTO0) interface signals from RZ/G1E CPU is available in this header.
This Expansion Header (J12) is physically located at the top of the board as shown below.
Figure 17: Expansion Header
Table 12: Expansion Header Pin Out
Pin
No
Signal Name
Signal Type /
Termination
Description
1
VCC_5V
O, 5V Power
5V Supply Voltage.
2
VCC_3V3
O, 3.3V Power
3.3V Supply Voltage.
3
HSCIF2_HTX(GP0_9)
O,3.3V CMOS
HSCIF2 Interface (UART) Transmit Signal.
4
HSCIF2_HRX(GP0_8)
I, 3.3V CMOS
HSCIF2 Interface (UART) Receive Signal.
5
HSCIF2_HCTS(GP0_11)
I, 3.3V CMOS
HSCIF2 Interface (UART) Ready To Send Signal.
6
HSCIF2_HRTS(GP0_12)
O,3.3V CMOS
HSCIF2 Interface (UART) Clear To Send Signal.
7
CAN1_TX/MSIOF2_SS1(GP1_2/M
DT0)
O, 3.3V CMOS
CAN1 Transmit Signal.
8
CAN1_RX/MSIOF2_SYNC(GP1_1)
I, 3.3V CMOS
CAN1 Receive Signal.
9
SCIF5_TXD(GP5_2)
O, 3.3V CMOS
SCIF5 Interface (UART) Transmit Signal.
10
SCIF5_RXD(GP5_1)
I, 3.3V CMOS
SCIF5 Interface (UART) Receive Signal.
11
SCIF1_TXD(GP4_15)
O, 3.3V CMOS
SCIF1 Interface (UART) Transmit Signal.
12
SCIF1_RXD(GP4_14)
I,3.3V CMOS
SCIF1 Interface (UART) Receive Signal.